參數(shù)資料
型號(hào): P89C51RD2HBP
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 80C51 8-bit Flash microcontroller family
中文描述: 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PDIP40
封裝: 0.600 INCH, PLASTIC, DIP-40
文件頁(yè)數(shù): 14/68頁(yè)
文件大?。?/td> 404K
代理商: P89C51RD2HBP
Philips Semiconductors
Preliminary data
P89C51RA2/RB2/RC2/RD2xx
80C51 8-bit Flash microcontroller family
8KB/16KB/32KB/64KB ISP/IAP Flash with 512B/512B/512B/1KB RAM
2002 Jul 18
14
INTn Pin
Timer n
Gate bit
TRn
TLn
(5 Bits)
THn
(8 Bits)
TFn
Interrupt
Control
C/T = 0
C/T = 1
SU01618
OSC
÷
d*
Tn Pin
*d = 6 in 6-clock mode; d = 12 in 12-clock mode.
Figure 2. Timer/Counter 0/1 Mode 0: 13-Bit Timer/Counter
IT0
BIT
TCON.7
SYMBOL
TF1
FUNCTION
Timer 1 overflow flag. Set by hardware on Timer/Counter overflow.
Cleared by hardware when processor vectors to interrupt routine, or clearing the bit in software.
Timer 1 Run control bit. Set/cleared by software to turn Timer/Counter on/off.
Timer 0 overflow flag. Set by hardware on Timer/Counter overflow.
Cleared by hardware when processor vectors to interrupt routine, or by clearing the bit in software.
Timer 0 Run control bit. Set/cleared by software to turn Timer/Counter on/off.
Interrupt 1 Edge flag. Set by hardware when external interrupt edge detected.
Cleared when interrupt processed.
Interrupt 1 type control bit. Set/cleared by software to specify falling edge/low level triggered
external interrupts.
Interrupt 0 Edge flag. Set by hardware when external interrupt edge detected.
Cleared when interrupt processed.
Interrupt 0 Type control bit. Set/cleared by software to specify falling edge/low level
triggered external interrupts.
TCON.6
TCON.5
TR1
TF0
TCON.4
TCON.3
TR0
IE1
TCON.2
IT1
TCON.1
IE0
TCON.0
IT0
SU01516
IE0
IT1
IE1
TR0
TF0
TR1
TF1
Bit Addressable
TCON
Address = 88H
Reset Value = 00H
7
6
5
4
3
2
1
0
Figure 3. Timer/Counter 0/1 Control (TCON) Register
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