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參數(shù)資料
| 型號(hào)： | P87C766CBP |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Microcontrollers for PAL/SECAM TV with OSD and VST |
| 中文描述： | 8-BIT, OTPROM, 12 MHz, MICROCONTROLLER, PDIP42 |
| 封裝： | 0.600 INCH, PLASTIC, SDIP-42 |
| 文件頁數(shù)： | 44/92頁 |
| 文件大?。?/td> | 382K |
| 代理商： | P87C766CBP |
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1999 Mar 10
44
Philips Semiconductors
Product specification
Microcontrollers for PAL/SECAM TV
with OSD and VST
P8xCx66 family
16 ANALOG-TO-DIGITAL CONVERTERS (ADC)
The 3 channel ADC consists of a 4-bit Digital-to-Analog
Converter (DAC), a comparator, an analog channel
selector and control circuitry. The block diagram of the
ADC circuit is shown in Fig.27.
One of these channels can be used to measure the level
of the Automatic Frequency Control signal. This is
achieved by comparing the ADC signal with the output of
a 4 bit DAC using the comparator (accuracy
±
1
2
LSB).
The ADC inputs ADC0, ADC1 and ADC2 share the same
pins as general I/O port lines P3.0, P3.1 and P3.2,
respectively. Selection of the pin function as either an ADC
input or a general I/O port line is achieved using bits
ADCE0, ADCE1 and ADCE2 in SFR SAD2 (see
Section 16.2).
The conversion time of the ADC is equal to 8 machine
cycles (8
μ
s at 12 MHz). Some NOP instructions should be
added in between the instruction which changes the
reference voltage or the channel selection and the
instruction which reads the VHI register bit. The ST bit
must be set to a logic 1 at the same time as the reference
voltage or channel selection change, otherwise the VHI
state of the previous comparison will be read out.
The recommended procedure is as follows:
1.
Write SFR SAD (X, CH<1:0>, ST = 1, SAD<3:0>)
2.
Wait 8 machine cycles (for example 8 NOPs)
3.
Read SFR SAD for VHI value.
ST is reset by hardware when it is set to a logic 1 by a
written instruction. When ST is read, the value is always a
logic 0.
Fig.27 ADC block diagram.
handbook, full pagewidth
4-BIT DAC
COMPARATOR
EN
SAD3
SAD2
SAD1
SAD0
ADCE1
ADCE0
ADCE2
CH1
CH0
MGL397
ADC enable selection (SFR address: CAH)
AFC value selection (SFR address: C8H)
ENABLE
SELECTOR
ADC
CHANNEL
SELECTOR
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0
Vref
DERIVATIVE PORT
SELECTOR
EN1
EN0
VHI
(SFR address: C8H)
internal bus
Channel selection
EN2
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