參數(shù)資料
型號(hào)： P87C576EFBB
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 80C51 8-bit microcontroller family 8K/256 OTP/ROM, 6 channel 10-bit A/D, 4 comparators, failure detect circuitry, watchdog timer
中文描述： 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP44
封裝： 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44
文件頁數(shù)： 33/46頁
文件大?。?/td> 447K
代理商： P87C576EFBB
Philips Semiconductors
Product specification
83C576/87C576
80C51 8-bit microcontroller family
8K/256 OTP/ROM, 6 channel 10-bit A/D, 4 comparators,
failure detect circuitry, watchdog timer
1998 Jun 04
33
AC ELECTRICAL CHARACTERISTICS
T
amb
= 0
°
C to +70
°
C, –40
°
C to +85
°
C, and –40
°
C to +125
°
C; V
CC
= 5V
±
10%, V
SS
= 0V
1, 2
VARIABLE CLOCK
SYMBOL
1/t
CLCL
FIGURE
25
PARAMETER
MIN
MAX
UNIT
Oscillator frequency:
Speed Version
8XC576
Oscillator fail detect frequency
E
6
16
5.5
MHz
MHz
μ
s
ns
OSCF
0.6
TR
Comparator response time
10
t
LHLL
t
AVLL
t
LLAX
t
LLIV
t
LLPL
t
PLPH
t
PLIV
t
PXIX
t
PXIZ
t
AVIV
t
PLAZ
Data Memory
25
ALE pulse width
2t
CLCL
–40
t
CLCL
–40
t
CLCL
–30
25
Address valid to ALE low
ns
25
Address hold after ALE low
ns
25
ALE low to valid instruction in
4t
CLCL
–100
ns
25
ALE low to PSEN low
t
CLCL
–30
3t
CLCL
–45
ns
25
PSEN pulse width
ns
25
PSEN low to valid instruction in
3t
CLCL
–105
ns
25
Input instruction hold after PSEN
0
ns
25
Input instruction float after PSEN
t
CLCL
–25
5t
CLCL
–105
10
ns
25
Address to valid instruction in
ns
25
PSEN low to address float
ns
t
RLRH
t
WLWH
t
RLDV
t
RHDX
t
RHDZ
t
LLDV
t
AVDV
t
LLWL
t
AVWL
t
QVWX
t
WHQX
t
RLAZ
t
WHLH
External Clock
t
CHCX
t
CLCX
t
CLCH
t
CHCL
Shift Register
26, 27
RD pulse width
6t
CLCL
–100
6t
CLCL
–100
ns
26, 27
WR pulse width
ns
26, 27
RD low to valid data in
5t
CLCL
–165
ns
26, 27
Data hold after RD
0
ns
26, 27
Data float after RD
2t
CLCL
–60
8t
CLCL
–150
9t
CLCL
–165
3t
CLCL
+50
ns
26, 27
ALE low to valid data in
ns
26, 27
Address to valid data in
ns
26, 27
ALE low to RD or WR low
3t
CLCL
–50
4t
CLCL
–130
t
CLCL
–50
t
CLCL
–50
ns
26, 27
Address valid to WR low or RD low
ns
26, 27
Data valid to WR transition
ns
26, 27
Data hold after WR
ns
26, 27
RD low to address float
0
ns
26, 27
RD or WR high to ALE high
t
CLCL
–40
t
CLCL
+40
ns
29
High time
20
ns
29
Low time
20
ns
29
Rise time
20
ns
29
Fall time
20
ns
t
XLXL
t
QVXH
t
XHQX
t
XHDX
t
XHDV
NOTES:
1. Parameters are valid over operating temperature range unless otherwise specified.
2. Load capacitance for port 0, ALE, and PSEN = 100pF, load capacitance for all other outputs = 80pF.
3. Interfacing the 83C576/87C576 to devices with float times up to 45ns is permitted. This limited bus contention will not cause damage to Port
0 drivers.
28
Serial port clock cycle time
12t
CLCL
10t
CLCL
–133
2t
CLCL
–60
0
ns
28
Output data setup to clock rising edge
ns
28
Output data hold after clock rising edge
ns
28
Input data hold after clock rising edge
ns
28
Clock rising edge to input data valid
10t
CLCL
–133
ns
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P87C576EHBB 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80C51 8-bit microcontroller family 8K/256 OTP/ROM, 6 channel 10-bit A/D, 4 comparators, failure detect circuitry, watchdog timer
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