參數(shù)資料
型號: P87C511
廠商: Intel Corp.
英文描述: CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER
中文描述: CHMOS單片8位微控制器
文件頁數(shù): 12/21頁
文件大?。?/td> 284K
代理商: P87C511
87C51/80C51BH/80C31BH
EXPLANATION OF THE AC SYMBOLS
Each timing symbol has 5 characters. The first char-
acter is always a ‘T’ (stands for time). The other
characters, depending on their positions, stand for
the name of a signal or the logical status of that
signal. The following is a list of all the characters and
what they stand for.
A:Address.
C:Clock.
D:Input data.
H:Logic level HIGH.
I:Instruction (program memory contents).
L:Logic level LOW, or ALE.
P:PSEN.
Q:Output data.
R:RD signal.
T:Time.
V:Valid.
W:WR signal.
X:No longer a valid logic level.
Z:Float.
For example,
TAVLL
e
Time from Address Valid to ALE Low.
TLLPL
e
Time from ALE Low to PSEN Low.
AC CHARACTERISTICS:
(Over Operating Conditions; Load Capacitance for Port 0, ALE, and
PSEN
e
100 pF; Load Capacitance for All Other Outputs
e
80 pF)
EXTERNAL MEMORY CHARACTERISTICS
All parameter values apply to all devices unless otherwise indicated. In this table, 87C51/BH refers to
87C51/BH, 87C51-1/BH-1 and 87C51-2/BH-2.
Symbol
Parameter
Oscillator
Units
12 MHz
24 MHz
Variable
Min
Max
Min
Max
Min
Max
1/TCLCL
Oscillator Frequency
87C51/BH
87C51-1/BH-1
87C51-2/BH-2
87C51-24/BH-24
3.5
3.5
0.5
3.5
12
16
12
24
MHz
MHz
MHz
MHz
TLHLL
ALE Pulse Width
127
43
2TCLCL
b
40
ns
TAVLL
Address Valid to ALE Low
87C51/BH
87C51-24/BH-24
43
TCLCL
b
40
TCLCL
b
30
TCLCL
b
30
ns
ns
12
TLLAX
Address Hold After ALE Low
53
12
ns
TLLIV
ALE Low to Valid Instr In
87C51/BH
87C51-24/BH-24
234
4TCLCL
b
100
4TCLCL
b
75
ns
ns
91
TLLPL
ALE Low to PSEN Low
53
12
TCLCL
b
30
3TCLCL
b
45
ns
TPLPH
PSEN Pulse Width
205
80
ns
TPLIV
PSEN Low to Valid Instr In
87C51/BH
87C51-24/BH-24
145
3TCLCL
b
105
3TCLCL
b
90
ns
ns
35
12
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