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| 型號： | P83CE559 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Single-chip 8-bit microcontroller(8位單片微控制器) |
| 中文描述： | 單芯片8位微控制器（8位單片微控制器） |
| 文件頁數(shù)： | 19/72頁 |
| 文件大小： | 524K |
| 代理商： | P83CE559 |
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Philips Semiconductors
Preliminary specification
P83CE559/P80CE559
Single-chip 8-bit microcontroller
1996 Aug 06
19
6.6.1
Functional Description
Table 9.
A/D Special Function Registers
SYMBOL
NAME
ACCESS
ADCON
A/D control register
read/write
ADPSS
Analog port scan–select register
read/write
ADRSLn
8 A/D result registers, the 8 lower bits (n: 0...7)
read only
ADRSH
A/D result register, the 2 higher bits
read only
P5
Digital input port (shared with analog inputs)
read only
A/D Control Register ADCON
The Special Function Register ADCON contains control and status
bits for the A/D Converter peripheral block. The reset value of
ADCON is (00000000). Its hardware address is D7H. ADCON is not
bit addressable.
7
6
5
4
3
2
1
0
ADCON (D7H)
ADPR1
ADPR0
ADPOS
ADINT
ADSST
ADCSA
ADSRE
ADSFE
Figure 15. ADC control register.
Table 10.
Description of ADCON bits
SYMBOL
BIT
FUNCTION
ADCON.7
ADCON.6
ADPR1
ADPR0
Control bit for the prescaler.
Control bit for the prescaler.
ADPR1=0 ADPR0=0 Prescaler divides by 2 (default by reset)
ADPR1=0 ADPR0=1 Prescaler divides by 4
ADPR1=1 ADPR0=0 Prescaler divides by 6
ADPR1=1 ADPR0=1 Prescaler divides by 8
ADCON.5
ADPOS
ADPOS is reserved for future use. Must be ‘0’ if ADCON is written.
ADCON.4
ADINT
ADC interrupt flag. This flag is set when all selected analog inputs are converted, as well in continuous scan
as in one–time scan mode. An interrupt is invoked if this interrupt is enabled. ADINT must be cleared by
software. It cannot be set by software.
ADCON.3
ADSST
ADC start and status. Setting this bit by software or by hardware (via ADEXS input) starts the A/D conversion
of the selected analog inputs. ADSST stays a ‘one’ in continuous scan mode. In one–time scan mode, ADSST
is cleared by hardware when the last selected analog input channel has been converted. As long as ADSST
is ‘1’, new start commands to the ADC–block are ignored.
An A/D conversion in progress is aborted if ADSST is cleared by software.
ADCON.2
ADCSA
1
0
=
=
Continuous scan of the selected analog inputs after a start of an A/D conversion.
One–time scan of the selected analog inputs after a start of an A/D conversion.
ADCON.1
ADSRE
1
0
=
=
A rising edge at input ADEXS will start the A/D conversion and generate a capture signal.
A rising edge at input ADEXS has no effect.
ADCON.0
ADSFE
1
0
=
=
A falling edge at input ADEXS will start the A/D conversion and generate a capture signal.
A falling edge at input ADEXS has no effect.
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