參數(shù)資料
型號(hào)： P83C851FFP
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： CMOS single-chip 8-bit microcontroller with on-chip EEPROM
中文描述： 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PDIP40
封裝： 0.600 INCH, PLASTIC, DIP-40
文件頁(yè)數(shù)： 11/22頁(yè)
文件大?。?/td> 182K
代理商： P83C851FFP
Philips Semiconductors
Product specification
80C851/83C851
CMOS single-chip 8-bit microcontroller
with on-chip EEPROM
1998 Jul 03
11
DC ELECTRICAL CHARACTERISTICS
T
amb
= 0
°
C to +70
°
C (V
DD
= 5V
±
10%), –40
°
C to +85
°
C (V
DD
= 5V
±
10%), or –40
°
C to +125
°
C (V
DD
= 5V
±
10%), V
SS
= 0V
PART
TYPE
TEST
LIMITS
SYMBOL
PARAMETER
CONDITIONS
MIN
MAX
UNIT
V
IL
Input low voltage, except EA
0 to +70
°
C
–40 to +85
°
C
–40 to +125
°
C
–0.5
–0.5
–0.5
0.2V
DD
–0.1
0.2V
DD
–0.15
0.2V
DD
–0.25
0.2V
DD
–0.3
0.2V
DD
–0.35
0.2V
DD
–0.45
V
DD
+0.5
V
DD
+0.5
V
DD
+0.5
V
DD
+0.5
V
DD
+0.5
V
DD
+0.5
0.45
V
V
V
V
IL1
Input low voltage to EA
0 to +70
°
C
–40 to +85
°
C
–40 to +125
°
C
–0.5
–0.5
–0.5
V
V
V
V
IH
Input high voltage, except XTAL1, RST
0 to +70
°
C
–40 to +85
°
C
–40 to +125
°
C
0.2V
DD
+0.9
0.2V
DD
+1.0
0.2V
DD
+1.0
0.7V
DD
0.7V
DD
0.7V
D
+0.1
V
V
V
V
IH1
Input high voltage, XTAL1, RST
0 to +70
°
C
–40 to +85
°
C
–40 to +125
°
C
V
OL
V
OL1
V
OH
Output low voltage, ports 1, 2, 3
6
Output low voltage, port 0, ALE, PSEN
6
I
OL
= 1.6mA
4
I
OL
= 3.2mA
4
I
OH
= –60
μ
A,
I
OH
= –25
μ
A,
I
OH
= –10
μ
A
I
OH
= –800
μ
A,
I
OH
= –300
μ
A,
OH
= –80
μ
A
V
IN
= 0.45V
V
0.45
V
Output high voltage, ports 1, 2, 3, ALE, PSEN
2.4
0.75V
DD
0.9V
DD
2.4
0.75V
DD
0.9V
DD
V
V
V
V
OH1
Output high voltage, port 0 in external bus
mode
5
V
V
V
I
IL
Logical 0 input current, ports 1, 2, 3
0 to +70
°
C
–40 to +85
°
C
–40 to +125
°
C
–50
–75
–75
μ
A
μ
A
μ
A
I
TL
Logical 1-to-0 transition current, ports 1, 2, 3
0 to +70
°
C
–40 to +85
°
C
–40 to +125
°
C
V
IN
= 2.0V
–650
–750
–750
±
10
μ
A
μ
A
μ
A
I
L1
Input leakage current, port 0, EA
0.45V<V
i
<V
DD
μ
A
I
DD
Power supply current:
Active mode @ 16MHz
1
Active mode @ 24MHz
1
Idle mode @ 16MHz
2
Idle mode @ 24MHz
2
Power down mode
3
See note 7
19
29
3.7
5.6
50
mA
mA
mA
mA
μ
A
k
R
RST
C
IO
NOTES:
1. The operating supply current is measured with all output pins disconnected; XTAL1 driven with t
r
= t
f
= 5ns; V
IL
= V
SS
+0.5V;
V
IH
= V
DD
– 0.5V; XTAL2 not connected; EA = RST = Port 0 = V
DD
.
2. The idle mode supply current is measured with all output pins disconnected; XTAL1 driven with t
r
= t
f
= 5ns; V
IL
= V
SS
+0.5V;
V
IH
= V
DD
– 0.5V; XTAL2 not connected; EA = Port 0 = V
DD
; RST = V
SS
.
3. The power-down current is measured with all output pins disconnected; XTAL2 not connected; EA = Port 0 = V
DD
; RST = XTAL1 = V
SS
.
4. Capacitive loading on Port 0 and Port 2 may cause spurious noise pulses to be superimposed on the LOW level output voltage of ALE, Port
1 and Port 3. The noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins make a 1-to-0
transition during bus operations. In the worst cases (capacitive loading > 100pF), the noise pulse on the ALE line may exceed 0.8V. In such
cases it may be desirable to qualify ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger STROBE input.
5. Capacitive loading on Port 0 and Port 2 may cause the HIGH level output voltage on ALE and PSEN to momentarily fall below the 0.9V
DD
specification when the address bits are stabilizing.
6. Under steady state (non-transient) conditions, I
OL
must be externally limited as follows:
Maximum I
OL
per Port pin:
Maximum I
OL
per 8-bit port –
Port 0:
26mA
Ports 1, 2, and 3:
15mA
Maximum total I
for all output pins:
71mA.
If I
OL
exceeds the test condition, V
OL
may exceed the related specification. Pins are not guaranteed to sink current greater than the listed
test conditions.
7. See Figures 11 through 14 for I
DD
test conditions.
Internal reset pull-down resistor
50
150
Pin capacitance
f = 1MHz
10
pF
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