- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄367726 > P83C570 (NXP Semiconductors N.V.) Microcontrollers for NTSC TVs with On-Screen Display OSD and Closed Caption CC PDF資料下載
參數(shù)資料
| 型號： | P83C570 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Microcontrollers for NTSC TVs with On-Screen Display OSD and Closed Caption CC |
| 中文描述： | 微控制器用于NTSC電視的屏幕顯示OSD和字幕消委會 |
| 文件頁數(shù)： | 23/80頁 |
| 文件大?。?/td> | 266K |
| 代理商： | P83C570 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁當(dāng)前第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁
1999 Jun 11
23
Philips Semiconductors
Product specification
Microcontrollers for NTSC TVs with On-Screen
Display (OSD) and Closed Caption (CC)
P8xCx70 family
11.3
Interrupt priority structure
Each interrupt source can be assigned one of two priority
levels. Interrupt priority levels are defined by the Interrupt
Priority Registers (IP0 and IP1). These registers are
described in Sections 11.3.1 and 11.3.2.
A low priority interrupt may be interrupted by a high priority
interrupt level interrupt. A high priority interrupt routine
cannot be interrupted by any other interrupt source. If two
interrupts of different priority occur simultaneously, the
high priority level request is serviced. If requests of the
same priority are received simultaneously, an internal
polling sequence determines which request is serviced.
Thus, within each priority level, there is a second priority
structure determined by the polling sequence. This second
priority structure is shown in Table 25.
Table 25
Interrupt priority
Note
1.
The ‘priority within level’ structure is only used to
resolve simultaneous requests of the same priority
level.
SOURCE
PRIORITY WITHIN LEVEL
(1)
INT0
I
2
C-bus
Timer 0
INT1
BUSY
Timer 1
CC
highest
↓
↓
↓
↓
↓
lowest
11.3.1
I
NTERRUPT
P
RIORITY
R
EGISTER
0 (IP0)
Table 26
Interrupt Priority Register 0 (SFR address B8H)
Table 27
Description of IP0 bits
Note
1.
Where: logic 0 = low priority; logic 1 = high priority.
7
6
5
4
3
2
1
0
PS1
PT1
PX1
PT0
PX0
BIT
(1)
SYMBOL
PS1
PT1
PX1
PT0
PX0
DESCRIPTION
7 to 6
5
4
3
2
1
0
This bit is not used, program to a logic 0 for future compatibility reasons.
I
2
C-bus SIO interrupt priority level.
This bit is not used, program to a logic 0 for future compatibility reasons.
Timer 1 interrupt priority level.
External interrupt 1 priority level.
Timer 0 interrupt priority level.
External interrupt 0 priority level.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| P83C770AAR | Microcontrollers for PAL/SECAM TV with OSD and VST(帶 OSD和 VST的在PAL/SECAM TV中應(yīng)用的微控制器) |
| P83C766BDA | Microcontrollers for PAL/SECAM TV with OSD and VST(帶 OSD和 VST的在PAL/SECAM TV中應(yīng)用的微控制器) |
| P83C770 | Microcontrollers for NTSC TVs with On-Screen Display (OSD) and Closed Caption (CC)(在NTSC TV中應(yīng)用的具有屏幕顯示和字幕關(guān)閉特點的微控制器) |
| P83C366BDA | Microcontrollers for PAL/SECAM TV with OSD and VST(帶 OSD和 VST的在PAL/SECAM TV中應(yīng)用的微控制器) |
| P83C566BDA | Microcontrollers for PAL/SECAM TV with OSD and VST(帶 OSD和 VST的在PAL/SECAM TV中應(yīng)用的微控制器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P83C570AAR | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Microcontrollers for NTSC TVs with On-Screen Display OSD and Closed Caption CC |
| P83C575EBA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| P83C575EBAA | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80C51 8-bit microcontroller family 8K/256 OTP/ROM/ROMless, 4 comparator, failure detect circuitry, watchdog timer |
| P83C575EBB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| P83C575EBBB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80C51 8-bit microcontroller family 8K/256 OTP/ROM/ROMless, 4 comparator, failure detect circuitry, watchdog timer |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。