- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄367738 > P83C554SBBD (NXP SEMICONDUCTORS) 80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP PDF資料下載
參數(shù)資料
| 型號： | P83C554SBBD |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP |
| 中文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, SOT-314-2, LQFP-64 |
| 文件頁數(shù)： | 33/76頁 |
| 文件大?。?/td> | 400K |
| 代理商： | P83C554SBBD |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁當(dāng)前第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁
Philips Semiconductors
Preliminary specification
80C554/83C554/87C554
80C51 8-bit microcontroller – 6 clock operation
16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I
2
C, PWM,
capture/compare, high I/O, 64L LQFP
2000 Nov 10
33
V
DD
OTHER DEVICE WITH
I
C INTERFACE
8XC554
OTHER DEVICE WITH
I
C INTERFACE
P1.7/SDA
P1.6/SCL
SDA
SCL
I
2
C bus
R
P
R
P
SU00964
Figure 33. Typical I
2
C Bus Configuration
SCL
START
CONDITION
S
SDA
P/S
MSB
ACKNOWLEDGMENT
SIGNAL FROM RECEIVER
CLOCK LINE HELD LOW WHILE
INTERRUPTS ARE SERVICED
1
2
7
8
9
1
2
3–8
ACK
9
ACK
REPEATED IF MORE BYTES
ARE TRANSFERRED
ACKNOWLEDGMENT
SIGNAL FROM RECEIVER
SLAVE ADDRESS
R/W
DIRECTION
BIT
STOP
CONDITION
REPEATED
START
CONDITION
SU00965
Figure 34. Data Transfer on the I
2
C Bus
SIO1 Implementation and Operation:
Figure 35 shows how the
on-chip I
2
C bus interface is implemented, and the following text
describes the individual blocks.
I
NPUT
F
ILTERS
AND
O
UTPUT
S
TAGES
The input filters have I
2
C compatible input levels. If the input voltage
is less than 1.5 V, the input logic level is interpreted as 0; if the input
voltage is greater than 3.0 V, the input logic level is interpreted as 1.
Input signals are synchronized with the internal clock (f
OSC
/2), and
spikes shorter than three oscillator periods are filtered out.
The output stages consist of open drain transistors that can sink
3 mA at V
OUT
< 0.4 V. These open drain outputs do not have
clamping diodes to V
DD
. Thus, if the device is connected to the I
2
C
bus and V
DD
is switched off, the I
2
C bus is not affected.
A
DDRESS
R
EGISTER,
S
1
ADR
This 8-bit special function register may be loaded with the 7-bit slave
address (7 most significant bits) to which SIO1 will respond when
programmed as a slave transmitter or receiver. The LSB (GC) is
used to enable general call address (00H) recognition.
C
OMPARATOR
The comparator compares the received 7-bit slave address with its
own slave address (7 most significant bits in S1ADR). It also
compares the first received 8-bit byte with the general call address
(00H). If an equality is found, the appropriate status bits are set and
an interrupt is requested.
S
HIFT
R
EGISTER,
S
1
DAT
This 8-bit special function register contains a byte of serial data to
be transmitted or a byte which has just been received. Data in
S1DAT is always shifted from right to left; the first bit to be
transmitted is the MSB (bit 7) and, after a byte has been received,
the first bit of received data is located at the MSB of S1DAT. While
data is being shifted out, data on the bus is simultaneously being
shifted in; S1DAT always contains the last byte present on the bus.
Thus, in the event of lost arbitration, the transition from master
transmitter to slave receiver is made with the correct data in S1DAT.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| P80C554SBBD | 80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP |
| P87C554SFBD | 80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP |
| P83C554SFBD | 80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP |
| P87C554 | 80C51 8-bit microcontroller(80C51 8位微控制器) |
| P87C654X2 | Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs 20-CDIP -55 to 125 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P83C554SFBD | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP |
| P83C557E4 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 8-bit microcontroller |
| P83C557E4EBB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 8-bit microcontroller |
| P83C557E4EBB/YYY | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| P83C557E4EFB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 8-bit microcontroller |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。