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參數(shù)資料
| 型號： | P83C550EBPN |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 80C51 8-bit microcontroller family 4K/128 OTP/ROM/ROMless, 8 channel 8 bit A/D, watchdog timer |
| 中文描述： | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | 0.600 INCH, PLASTIC, DIP-40 |
| 文件頁數(shù)： | 6/28頁 |
| 文件大?。?/td> | 190K |
| 代理商： | P83C550EBPN |
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Philips Semiconductors
Product specification
80C550/83C550/87C550
80C51 8-bit microcontroller family
4K/128 OTP/ROM/ROMless, 8 channel 8 bit A/D, watchdog timer
1998 May 01
6
Table 1.
8XC550 Special Function Registers
SYMBOL
DESCRIPTION
DIRECT
ADDRESS
BIT ADDRESS, SYMBOL, OR ALTERNATIVE PORT FUNCTION
MSB
LSB
RESET
VALUE
ACC*
Accumulator
E0H
E7
E6
E5
E4
E3
E2
E1
E0
00H
ADAT#
A/D result
C6H
xxH
ADCON#
A/D control
C5H
–
–
–
ADCI
ADCS
AADR2
AADR1
AADR0
xxx00000B
B*
B register
F0H
F7
F6
F5
F4
F3
F2
F1
F0
00H
DPTR:
DPH
DPL
Data pointer
(2 bytes):
High byte
Low byte
83H
82H
00H
00H
BF
BE
BD
BC
BB
BA
B9
B8
IP*#
Interrupt priority
B8H
–
PWD
PAD
PS
PT1
PX1
PT0
PX0
x0000000B
AF
AE
AD
AC
AB
AA
A9
A8
IE*#
Interrupt enable
A8H
EA
EWD
EAD
ES
ET1
EX1
ET0
EX0
00H
P0*
Port 0
80H
87
86
85
84
83
82
81
80
FFH
P1*
Port 1
90H
97
96
95
94
93
92
91
90
FFH
P2*
Port 2
A0H
A7
A6
A5
A4
A3
A2
A1
A0
FFH
P3*
Port 3
B0H
B7
B6
B5
B4
B3
B2
B1
B 0
FFH
PCON#
Power control
87H
SMOD
SIDL
–
–
GF1
GF0
PD
IDL
00xx0000B
D7
D6
D5
D4
D3
D2
D1
D0
PSW*
Program status word
D0H
CY
AC
F0
RS1
RS0
OV
–
P
00H
SBUF
Serial data buffer
99H
xxH
9F
9E
9D
9C
9B
9A
99
98
SCON*
Serial port control
98H
SM0
SM1
SM2
REN
TB8
RB8
TI
RI
00H
SP
Stack pointer
81H
07H
8F
8E
8D
8C
8B
8A
89
88
00H
TCON*
Timer counter/control
88H
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
00H
TMOD
Timer/counter mode
89H
GATE
C/T
M1
M0
GATE
C/T
M1
M0
00H
TH0
Timer 0 high byte
8CH
00H
TH1
Timer 1 high byte
8DH
00H
TL0
Timer 0 low byte
8AH
00H
TL1
Timer 1 low byte
8BH
00H
C7
C6
C5
C4
C3
C2
C1
C0
WDCON*#
Watchdog timer
control
C0H
PRE2
PRE1
PRE0
–
–
WDRUN
WDTOF
WDMOD
000xx000B**
WDL#
Watchdog timer
reload
C1H
FFH**
WFEED1#
Watchdog timer
feed 1
C2H
xxH
WFEED2#
Watchdog timer
feed 2
C3H
xxH
* SFRs are bit addressable.
# SFRs are modified from or added to the 80C51 SFRs.
**This value is not valid for a masked ROM part (83C550) when running from internal memory (EA = 1). See data sheet for details.
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