參數(shù)資料
型號(hào)： P83C524EFA
廠(chǎng)商： NXP SEMICONDUCTORS
元件分類(lèi)： 微控制器/微處理器
英文描述： CONN, JACK MODULAR 90DEG 4P 4C
中文描述： 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQCC44
封裝： PLASTIC, LCC-44
文件頁(yè)數(shù)： 36/76頁(yè)
文件大?。?/td> 400K
代理商： P83C524EFA
1997 Dec 15
36
Philips Semiconductors
Product specification
8-bit microcontrollers
P83C524; P80C528; P83C528
Table 20
Description of the S1SCS bits
BIT
SYMBOL
FUNCTION
7
SDO/SDI
Serial Data Output and the filtered Serial Data Input
. SDI data is latched on the rising
edge of the filtered serial clock. S1SCS.7 accesses the same memory locations as
S1BIT.7. Access of the data bit via S1SCS will not start an auto-clock pulse.
Serial Clock Output and the filtered Serial Clock Input
. Serial clock output SCO is
'OR-ed' with the auto-clock. If SCO = 1 the auto-clock output is inhibited. The internal
clock stretching logic and external devices can pull the SCL line LOW. If the auto-clock
is not used, the SCL line has to be controlled by setting SCO = 1, waiting for CLH = 1
and setting SCO = 0 after the specified SCL HIGH time. (Because of the input filter,
CLH will be set at least 8 XTAL clock periods after the SCL LOW-to-HIGH transition.)
Serial Clock LOW-to-HIGH transition flag
: set with a rising edge of the filtered serial
clock. CLH = 1 indicates that, since the last CLH reset, a new valid data bit has been
latched in SDI. CLH can be reset by writing a 0 to S1SCS.5 or by a read/write of S1BIT.
Clearing CLH also clears RBF and WBF.
Bus Busy flag
: indicating that there has been a START condition that was not yet
followed by a STOP condition.
Read Bit Finished flag
: indicating a successful bit read.
RBF = 1 implies the following conditions:
CLH = 1: SCL had a rising edge
SCI = 0: the SCL pulse has finished
SI = 0: no START condition occurred
BB = 1: no STOP condition occurred
The RBF flag can be cleared by clearing the CLH flag.
Write Bit Finished flag
: indicating a successful bit write. The same conditions as for
RBF are true and also no 'arbitration loss' condition occurred. Arbitration is lost if a
1 data bit in SDO was over-ruled on SDA by an external device. The WBF flag can be
cleared by clearing the CLH flag.
STRetch control flag
. STR = 1 enables stretching of all SCL LOW periods. This allows
the processor in I
2
C slave mode to react on a fast master. The STR flag remains set
until cleared by writing a 0 to S1SCS.1.
6
SCO/SCI
5
CLH
4
BB
3
RBF
2
WBF
1
STR
The STretch (ST)
flag (not readable) pulls the serial clock LOW while ST = 1. The ST
flag is set on the falling edge of the filtered serial clock if STR = 1. It is also set after
reception of a START condition, regardless of the STR contents. ST is cleared with a
read or write of S1BIT.
ENable Serial I/O flag
. ENS = 1 enables the START detection and clock stretching
logic. ENS = 0 can be used to switch off the I
2
C-bus hardware. Note that the SDO and
SCO control flags must be set to 1 before ENS is set to avoid pulling SCL or SDA lines
to 0.
0
ENS
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
P83C524EFB 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:8-bit microcontrollers
P83C524EFP 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:8-bit microcontrollers
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P83C524FFP 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:8-Bit Microcontroller
P83C524FHA 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:8-Bit Microcontroller
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