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參數(shù)資料
| 型號： | P5Z22V10-7D |
| 英文描述： | Electrically-Erasable PLD |
| 中文描述： | 電可擦除可編程邏輯器件 |
| 文件頁數(shù)： | 8/16頁 |
| 文件大?。?/td> | 162K |
| 代理商： | P5Z22V10-7D |
Philips Semiconductors
Product specification
P5Z22V10
5V zero power, TotalCMOS
, universal PLD device
1997 May 02
8
ABSOLUTE MAXIMUM RATINGS
1
SYMBOL
PARAMETER
LIMITS
UNIT
MIN.
MAX.
V
DD
Supply voltage
–0.5
7.0
V
V
I
Input voltage
–1.2
V
DD
+ 0.5
V
V
OUT
Output voltage
–0.5
V
DD
+ 0.5
V
I
IN
Input current
–30
30
mA
I
OUT
Output current
–100
100
mA
T
R
Allowable thermal rise ambient to junction
0
75
°
C
T
J
Junction temperature range
–40
150
°
C
T
STG
Storage temperature range
–65
150
°
C
ESD
NOTE:
1. Stresses above those listed may cause malfunction or permanent damage to the device. This is a stress rating only. Functional operation at
these or any other condition above those indicated in the operational and programming specification of the device is not implied.
Static discharge voltage (human body)
1000
V
OPERATING RANGE
PRODUCT GRADE
TEMPERATURE
VOLTAGE
Commercial
0 to +70
°
C
5.0
±
5% V
Industrial
–40 to +85
°
C
5.0
±
10% V
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