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  • 參數(shù)資料
    型號(hào): P4C148-45CC
    廠商: PYRAMID SEMICONDUCTOR CORP
    元件分類: DRAM
    英文描述: ULTRA HIGH SPEED 1K x 4 STATIC CMOS RAMS
    中文描述: 1K X 4 STANDARD SRAM, 15 ns, CDIP18
    封裝: 0.300 INCH, SIDE BRAZED, CERAMIC, DIP-18
    文件頁(yè)數(shù): 1/10頁(yè)
    文件大?。?/td> 289K
    代理商: P4C148-45CC
    1
    Document #
    SRAM104
    REV B
    Revised April 2007
    DESCRIPTION
    The P4C148 and P4C149 are 4,096-bit ultra high-speed
    static RAMs organized as 1K x 4. Both devices have
    common input/output ports. The P4C148 enters the
    standby mode when the chip enable (
    CE
    ) goes HIGH;
    with CMOS input levels, power consumption is extremely
    low in this mode. The P4C149 features a fast chip select
    capability using
    CS
    . The CMOS memories require no
    clocks or refreshing, and have equal access and cycle
    times. Inputs are fully TTL-compatible. The RAMs
    operate from a single 5V
    ±
    10%
    tolerance power supply.
    P4C148, P4C149
    ULTRA HIGH SPEED 1K x 4
    STATIC CMOS RAMS
    FEATURES
    Full CMOS, 6T Cell
    High Speed (Equal Access and Cycle Times)
    – 10/12/15/20/25/35/45/55 ns (Commercial)
    – 15/20/25/35/45/55 ns (P4C148 Military)
    Low Power Operation
    Single 5V ± 10% Power Supply
    Two Options
    – P4C148 Low Power Standby Mode
    – P4C149 Fast Chip Select Control
    Common Input/Output Ports
    Three-State Outputs
    Fully TTL Compatible Inputs and Outputs
    Standard Pinout (JEDEC Approved)
    – 18 Pin 300 mil DIP
    – 18 Pin LCC (295 x 335 mil) [P4C148 only]
    – 18 Pin LCC (290 x 430 mil)
    FUNCTIONAL BLOCK DIAGRAM
    PIN CONFIGURATION
    Access times as fast as 10 nanoseconds are available,
    permitting greatly enhanced system operating speeds.
    CMOS is used to reduce power consumption when
    active; for the P4C148, consumption is further reduced in
    the standby mode.
    The P4C148 and P4C149 are available in 18-pin 300 mil
    DIP packages, as well as 2 different LCC packages,
    providing excellent board level densities.
    P4C148 DIP (C9, D1, P1)
    P4C149 DIP (P1)
    P4C148 LCC (L7, L7-1)
    P4C149 LCC (L7)
    相關(guān)PDF資料
    PDF描述
    P4C148-45CM ULTRA HIGH SPEED 1K x 4 STATIC CMOS RAMS
    P4C148-45CMB ULTRA HIGH SPEED 1K x 4 STATIC CMOS RAMS
    P4C148-45DC ULTRA HIGH SPEED 1K x 4 STATIC CMOS RAMS
    P4C148-45DM ULTRA HIGH SPEED 1K x 4 STATIC CMOS RAMS
    P4C148-45DMB ULTRA HIGH SPEED 1K x 4 STATIC CMOS RAMS
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