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參數(shù)資料
| 型號： | P4C1282-20JM |
| 廠商： | PYRAMID SEMICONDUCTOR CORP |
| 元件分類： | SRAM |
| 英文描述： | 64K X 4 STANDARD SRAM, 20 ns, PDSO28 |
| 封裝： | 0.300 INCH, PLASTIC, SOJ-28 |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 862K |
| 代理商： | P4C1282-20JM |
P4C1281/P4C1282 - ULTRA HIGH SPEED 64K x 4 CMOS STATIC RAMS
Page 6
Document # SRAM136 REV OR
AC TEST COnDITIOnS
TRUTH TABLE
P4C1281 (P4C1282)
Input Pulse Levels
GND to 3.0V
Input Rise and Fall Times
3ns
Input Timing Reference Level
1.5V
Output Timing Reference Level
1.5V
Output Load
See Figures 1 and 2
Mode
CE
WE
I/O
Power
Standby
H
x
High Z
Standby
Read
L
H
D
OUT
Active
Write
L
D
IN (High Z)
Active
Figure 1. Output Load
Figure 2. Thevenin Equivalent
* including scope and test fixture.
note:
Because of the ultra-high speed of the P4C1281 and P4C1282, care
must be taken when testing this device; an inadequate setup can cause
a normal functioning part to be rejected as faulty. Long high-inductance
leads that cause supply bounce must be avoided by bringing the V
CC
and ground planes directly up to the contactor fingers. A 0.01 F high
frequency capacitor is also required between V
CC and ground. To avoid
signalreflections,properterminationmustbeused;forexample,a50test
environment should be terminated into a 50 load with 1.73V (Thevenin
Voltage) at the comparator input, and a 116 resistor must be used in
series with D
OUT to match 166 (Thevenin Resistance).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| P4C1282-20PC | 64K X 4 STANDARD SRAM, 20 ns, PDIP28 |
| P4C1681-12JI | 4K X 4 STANDARD SRAM, 12 ns, PDSO24 |
| P4C116-10PI | 2K X 8 STANDARD SRAM, 10 ns, PDIP24 |
| PC-12-350C6 | POWER TRANSFORMER, 4.4 VA |
| PC-20-500A15 | POWER TRANSFORMER, 10 VA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P4C1282-20LC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 SRAM |
| P4C1282-20PC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 SRAM |
| P4C1282-25CC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 SRAM |
| P4C1282-25CM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 SRAM |
| P4C1282-25CMB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 SRAM |
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