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參數(shù)資料
| 型號(hào)： | OR2C15A-6J208 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | FPGA |
| 英文描述： | Field-Programmable Gate Arrays |
| 中文描述： | 現(xiàn)場(chǎng)可編程門陣列 |
| 文件頁數(shù)： | 79/192頁 |
| 文件大小： | 3148K |
| 代理商： | OR2C15A-6J208 |
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Lucent Technologies Inc.
17
Data Sheet
June 1999
ORCA Series 2 FPGAs
Programmable Logic Cells (continued)
PLC Routing Resources
Generally, the
ORCA Foundry Development System is
used to automatically route interconnections. Interac-
tive routing with the
ORCA Foundry design editor
(EPIC) is also available for design optimization. To use
EPIC for interactive layout, an understanding of the
routing resources is needed and is provided in this sec-
tion.
The routing resources consist of switching circuitry and
metal interconnect segments. Generally, the metal lines
which carry the signals are designated as routing
nodes (lines). The switching circuitry connects the rout-
ing nodes, providing one or more of three basic func-
tions: signal switching, amplification, and isolation. A
net running from a PFU or PIC output (source) to a
PLC or PIC input (destination) consists of one or more
lines, connected by switching circuitry designated as
configurable interconnect points (CIPs).
The following sections discuss PLC, PIC, and interquad
routing resources. This section discusses the PLC
switching circuitry, intra-PLC routing, inter-PLC routing,
and clock distribution.
Configurable Interconnect Points
The process of connecting lines uses three basic types
of switching circuits: two types of configurable intercon-
nect points (CIPs) and bidirectional buffers (BIDIs). The
basic element in CIPs is one or more pass transistors,
each controlled by a configuration RAM bit. The two
types of CIPs are the mutually exclusive (or multi-
plexed) CIP and the independent CIP.
A mutually exclusive set of CIPs contains two or more
CIPs, only one of which can be on at a time. An inde-
pendent CIP has no such restrictions and can be on
independent of the state of other CIPs. Figure 19
shows an example of both types of CIPs.
f.13(F)
Figure 19. Configurable Interconnect Point
3-Statable Bidirectional Buffers
Bidirectional buffers provide isolation as well as amplifi-
cation for signals routed a long distance. Bidirectional
buffers are also used to drive signals directly onto
either vertical or horizontal XL and XH lines (to be
described later in the inter-PLC routing section). BIDIs
are also used to indirectly route signals through the
switching lines. Any number from zero to eight BIDIs
can be used in a given PLC.
The BIDIs in a PLC are divided into two nibble-wide
sets of four (BIDI and BIDIH). Each of these sets has a
separate BIDI controller that can have an application
net connected to its TRI input, which is used to 3-state
enable the BIDIs. Although only one application net can
be connected to both BIDI controllers, the sense of this
signal (active-high, active-low, or ignored) can be con-
figured independently. Therefore, one set can be used
for driving signals, the other set can be used to create
3-state buses, both sets can be used for 3-state buses,
and so forth.
2
INDEPENDENT CIP
CD
A
B
AB
=
MULTIPLEXED CIP
A
B
C
A
B
C
O
CD
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| OR2C15A-6J208I | Field-Programmable Gate Arrays |
| OR2C15A-6J240 | Field-Programmable Gate Arrays |
| OR2C15A-6J240I | Field-Programmable Gate Arrays |
| OR2C15A-6J256 | Field-Programmable Gate Arrays |
| OR2C15A-6J256I | Field-Programmable Gate Arrays |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| OR2C26A-2PS208I | 制造商:Orca 功能描述:Field-Programmable Gate Array, 576 Cell, 208 Pin, Plastic, QFP |
| OR2C26A3BA352I-DB | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Lattice Semiconductor Corporation 功能描述: |
| OR2C26A3PS208I-DB | 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 2304 LUT 342 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| OR2C26A3PS208-N-DB | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Lattice Semiconductor Corporation 功能描述: |
| OR2C26A3PS240I-DB | 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 2304 LUT 342 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
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