![](http://datasheet.mmic.net.cn/180000/OR2C06A-7J160_datasheet_11339907/OR2C06A-7J160_95.png)
Data Sheet
June 1999
ORCA Series 2 FPGAs
Lucent Technologies Inc.
95
U20
PR12B
PR13B
PR15B
PR17B
PR18A
I/O
T18
PR12C
PR13C
PR15C
PR17C
PR18B
I/O
T19
PR12D
PR13D
PR15D
PR17D
PR18D
I/O
T20
PR11A
PR12A
PR14A
PR16A
PR17A
I/O
R18
PR11B
PR12B
PR14C
PR16D
PR17D
I/O
P17
PR11C
PR12C
PR14D
PR15A
PR16A
I/O
R19
PR11D
PR12D
PR13A
PR15C
PR16C
I/O
R20
PR10A
PR11A
PR13B
PR15D
PR16D
I/O-M1
P18
PR10B
PR11B
PR13C
PR14A
PR15A
I/O
P19
PR10C
PR11C
PR12A
PR14D
PR15D
I/O-VDD5
P20
PR10D
PR11D
PR12B
PR13A
PR14A
I/O
N18
PR9A
PR10A
PR11A
PR12A
PR13A
I/O-M2
N19
PR9B
PR10B
PR11B
PR12B
PR13B
I/O
N20
PR9C
PR10C
PR11C
PR12C
PR13C
I/O
M17
PR9D
PR10D
PR11D
PR12D
PR13D
I/O
M18
PR8A
PR9A
PR10A
PR11A
PR12A
I/O-M3
M19
PR8B
PR9B
PR10B
PR11B
PR12B
I/O
M20
PR8C
PR9C
PR10C
PR11C
PR12C
I/O
L19
PR8D
PR9D
PR10D
PR11D
PR12D
I/O
L18
PR7A
PR8A
PR9A
PR10A
PR11A
I/O
L20
PR7B
PR8B
PR9B
PR10B
PR11B
I/O
K20
PR7C
PR8C
PR9C
PR10C
PR11C
I/O
K19
PR7D
PR8D
PR9D
PR10D
PR11D
I/O
K18
PR6A
PR7A
PR8A
PR9A
PR10A
I/O
K17
PR6B
PR7B
PR8B
PR9B
PR10B
I/O
J20
PR6C
PR7C
PR8C
PR9C
PR10C
I/O
J19
PR6D
PR7D
PR8D
PR9D
PR10D
I/O
J18
PR5A
PR6A
PR7A
PR8A
PR9A
I/O-VDD5
J17
PR5B
PR6B
PR7B
PR8B
PR9B
I/O
H20
PR5C
PR6C
PR7C
PR8C
PR9C
I/O
H19
PR5D
PR6D
PR7D
PR8D
PR9D
I/O
H18
PR4A
PR5A
PR6A
PR7A
PR8A
I/O-CS1
G20
PR4B
PR5B
PR6B
PR7B
PR8B
I/O
G19
PR4C
PR5C
PR6C
PR7C
PR8C
I/O
F20
PR4D
PR5D
PR6D
PR7D
PR8D
I/O
G18
PR3A
PR4A
PR5A
PR6A
PR7A
I/O-CS0
F19
PR3B
PR4B
PR6B
PR7B
I/O
E20
PR3C
PR4C
PR5B
PR6B
I/O
G17
PR3D
PR4D
PR5D
PR6D
I/O
F18
PR2A
PR3A
PR4A
PR5A
I/O-RD
Pin Information (continued)
Table 25. OR2C/2T06A, OR2C/2T08A, OR2C/2T10A, OR2C/2T12A, and OR2C/2T15A/B
256-Pin PBGA Pinout (continued)
Pin
2C/2T06A Pad
2C/2T08A Pad
2C/2T10A Pad
2C/2T12A Pad
2C/2T15A/B Pad
Function
Notes:
The W3 pin on the 256-pin PBGA package is unconnected for all devices listed in this table.
The OR2C/2T08A do not have bond pads connected to the 256-pin PBGA package pins F2 and Y17.
The pins labeled I/O-VDD5 are user I/Os for the OR2CxxA and OR2TxxB series, but they are connected to VDD5 for the OR2TxxA series.
The pins labeled VSS-ETC are the 4 x 4 array of thermal balls located at the center of the package. The balls can be attached to the ground
plane of the board for enhanced thermal capability (see Table 29), or they can be left unconnected.