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Data Sheet
ORCA Series 2 FPGAs
June 1999
68
Lucent Technologies Inc.
Pin Information (continued)
Package Compatibility
The package pinouts are consistent across
ORCA
Series FPGAs with the following exception: some user
I/O pins that do not have any special functions will
be converted to VDD5 pins for the OR2TxxA series.
If the designer does not use these pins for the
OR2CxxA and OR2TxxB series, then pinout compati-
bility will be maintained between the
ORCA OR2CxxA,
OR2TxxA, and OR2TxxB series of FPGAs. Note that
they must be connected to a power supply for the
OR2TxxA series.
Package pinouts being consistent across all
ORCA
Series FPGAs enables a designer to select a package
based on I/O requirements and change the FPGA with-
out laying out the printed-circuit board again. The
change might be to a larger FPGA if additional func-
tionality is needed, or it might be to a smaller FPGA to
decrease unit cost.
Table 18A provides the number of user I/Os available
for the
ORCA OR2CxxA and OR2TxxB Series FPGAs
for each available package, and
Table 18B provides the
number of user I/Os available in the
ORCA OR2TxxA
series. It should be noted that the number of user I/Os
available for the OR2TxxA series is reduced from the
equivalent OR2CxxA devices by the number of
required VDD5 pins, as shown in Table 18B. The pins that are converted from user I/O to VDD5 are denoted
as I/O-VDD5 in the pin information tables (Table 19 through 28). Each package has six dedicated configu-
ration pins.
Table 19—Table 28. provide the package pin and pin
function for the
ORCA Series 2 FPGAs and packages.
The bond pad name is identified in the PIC nomencla-
ture used in the
ORCA Foundry design editor.
When the number of FPGA bond pads exceeds the
number of package pins, bond pads are unused. When
the number of package pins exceeds the number of
bond pads, package pins are left unconnected (no
connects). When a package pin is to be left as a no
connect for a specific die, it is indicated as a note in the
device pad column for the FPGA. The tables provide no
information on unused pads.
* 432 EBGA not available for OR2T15B
Table 18A.
ORCA OR2CxxA and OR2TxxB Series FPGA I/Os Summary
Device
84-Pin
PLCC
100-Pin
TQFP
144-Pin
TQFP
160-Pin
QFP
208-Pin
SQFP/
SQFP2
240-Pin
SQFP/
SQFP2
256-Pin
PBGA
304-Pin
SQFP/
SQFP2
352-Pin
PBGA
432-Pin
EBGA
OR2C04A
User I/Os
64
77
114
130
160
—
VDD/VSS
14
17
24
31
—
OR2C06A
User I/Os
64
77
114
130
171
192
—
VDD/VSS
14
17
24
31
42
26
—
OR2C08A
User I/Os
64
—
130
171
192
221
—
VDD/VSS
14
—
24
31
40
26
—
OR2C10A
User I/Os
64
—
130
171
192
221
—
256
—
VDD/VSS
14
—
24
31
40
26
—
48
—
OR2C12A
User I/Os
64
—
171
192
223
252
288
—
VDD/VSS
14
—
31
422646
48
—
OR2C15A/OR2T15B
User I/Os
64
—
171
192
223
252
298
320*
VDD/VSS
14
—
31
422646
48
84
OR2C26A
User I/Os
—
171
192
—
252
298
342
VDD/VSS
—
31
42
—
46
48
84
OR2C40A/OR2T40B
User I/Os
—
171
192
—
252
—
342
VDD/VSS
—
31
42
—
46
—
84