參數(shù)資料
型號: OPAMP3EVB
廠商: ON SEMICONDUCTOR
英文描述: Op Amp Evaluation Board Manual TSSOP−16 Package
文件頁數(shù): 5/12頁
文件大小: 139K
代理商: OPAMP3EVB
OPAMP3EVB
http://onsemi.com
5
Board Design (NCS2540DTBEVB)
The evaluation board was designed for noninverting op
amp configuration (See Figure 5). The input contains
termination resistor (usually 50 ). The input can also be
monitored through J1, J4, and J7. The evaluation board has
versatile loading options for the op amp, depending on the
user’s preference, it can be configured as capacitive load,
series resistance load, parallel resistance load, etc.
V
CC
OA
Banana Jack
J10
D6
C7
C6
R7
C5
GND
Banana Jack
J12
EN1
JMP1
C4
R5
C3
C2
D7
V
EE
OA
Banana Jack
J11
BNC Connector
Scope
+IN1
J1
R1
R2
BNC Connector
+IN1
J2
R3
+
R6
R4
C9
R10
R11
BNC Connector
Out
J3
Ferrite Bead
L2
Ferrite Bead
L1
C12
11, 13, 16
C1
3, 6, 9
V
CC
V
EE
2
1
14
15
EN2
JMP2
BNC Connector
Scope
+IN2
J4
R8
R9
BNC Connector
+IN2
J5
R18
+
R17
R15
C10
R12
R13
BNC Connector
Out2
J6
V
CC
V
EE
5
4
13
12
Figure 5. NCS2540 Evaluation Board Schematic
C8
C
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