參數(shù)資料
型號: OPA860
元件分類: 跨導放大器
英文描述: Wide Bandwidth OPERATIONAL TRANSCONDUCTANCE AMPLIFIER (OTA) and BUFFER
中文描述: 寬帶運算跨導放大器(OTA)和緩沖區(qū)
文件頁數(shù): 25/29頁
文件大?。?/td> 613K
代理商: OPA860
www.ti.com
BOARD LAYOUT GUIDELINES
OPA860
SBOS331–JUNE 2005
As a worst-case example, compute the maximum T
J
using an OPA860ID in the circuit of
Figure 53
operating at the maximum specified ambient tem-
perature of +85
°
C and driving a grounded 20
load.
P
D
= 10V
×
11.2mA + 5
2
/(4
×
20
) = 424mW
Maximum T
J
= +85
°
C + (0.43W
×
125
°
C/W) = 139
°
C.
Although this is still well below the specified maxi-
mum junction temperature, system reliability con-
siderations may require lower tested junction tem-
peratures. The highest possible internal dissipation
will occur if the load requires current to be forced into
the output for positive output voltages or sourced
from the output for negative output voltages. This
puts a high current through a large internal voltage
drop in the output transistors. The output V-I plot
shown in the Typical Characteristics include a bound-
ary for 1W maximum internal power dissipation under
these conditions.
Larger (2.2μF to 6.8μF) decoupling capacitors, effec-
tive at lower frequency, should also be used on the
main supply pins. These may be placed somewhat
farther from the device and may be shared among
several devices in the same area of the PC board.
c) Careful selection and placement of external
components will preserve the high-frequency per-
formance of the OPA860.
Resistors should be a
very low reactance type. Surface-mount resistors
work best and allow a tighter overall layout. Metal film
or carbon composition, axially-leaded resistors can
also
provide
good
high-frequency
Again, keep their leads and PC board traces as short
as possible. Never use wirewound type resistors in a
high-frequency application.
performance.
d) Connections to other wideband devices
on the
board may be made with short, direct traces or
through onboard transmission lines. For short con-
nections, consider the trace and the input to the next
device as a lumped capacitive load. Relatively wide
traces (50mils to 100mils) should be used, preferably
with ground and power planes opened up around
them. Estimate the total capacitive load and set R
S
from the plot of
Recommended R
vs Capacitive
Load
. Low parasitic capacitive loads (< 5pF) may not
need an R
S
since the OPA860 is nominally compen-
sated to operate with a 2pF parasitic load. Higher
parasitic capacitive loads without an R
S
are allowed
as the signal gain increases (increasing the unloaded
phase margin). If a long trace is required, and the
6dB signal loss intrinsic to a doubly-terminated trans-
mission line is acceptable, implement a matched
impedance transmission line using microstrip or
stripline techniques (consult an ECL design handbook
for microstrip and stripline layout techniques). A 50
environment is normally not necessary on board, and
in fact, a higher impedance environment will improve
distortion as shown in the distortion versus load plots.
Achieving
high-frequency amplifier like the OPA860 requires
careful attention to board layout parasitics and exter-
nal component types. Recommendations that will
optimize performance include:
optimum
performance
with
a
a) Minimize parasitic capacitance
to any AC ground
for all of the signal I/O pins. Parasitic capacitance on
the output and inverting input pins can cause insta-
bility: on the noninverting input, it can react with the
source
impedance
to
bandlimiting. To reduce unwanted capacitance, a
window around the signal I/O pins should be opened
in all of the ground and power planes around those
pins. Otherwise, ground and power planes should be
unbroken elsewhere on the board.
cause
unintentional
b)
power-supply pins to high-frequency 0.1μF decoup-
ling capacitors. At the device pins, the ground and
power-plane layout should not be in close proximity to
the signal I/O pins. Avoid narrow power and ground
traces to minimize inductance between the pins and
the decoupling capacitors. The power-supply connec-
tions should always be decoupled with these capaci-
tors. An optional supply decoupling capacitor (0.1μF)
across the two power supplies (for bipolar operation)
will improve 2nd-harmonic distortion performance.
Minimize
the
distance
(<
0.25")
from
the
e) Socketing a high-speed part like the OPA860 is
not recommended.
The additional lead length and
pin-to-pin capacitance introduced by the socket can
create an extremely troublesome parasitic network
that makes it almost impossible to achieve a smooth,
stable frequency response. Best results are obtained
by soldering the OPA860 onto the board.
25
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OPA860IDG4 功能描述:跨導放大器 Wide BW Op Transcon Amp and Buffer RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 封裝 / 箱體:SOIC-14 帶寬: 輸入補償電壓:40 mV at +/- 5 V 電源電壓-最大:+/- 5 V 電源電流: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube
OPA860IDR 功能描述:跨導放大器 Wide Bandwidth Transconductance RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 封裝 / 箱體:SOIC-14 帶寬: 輸入補償電壓:40 mV at +/- 5 V 電源電壓-最大:+/- 5 V 電源電流: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube
OPA860IDRG4 功能描述:跨導放大器 Wide BW Op Transcon Amp and Buffer RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 封裝 / 箱體:SOIC-14 帶寬: 輸入補償電壓:40 mV at +/- 5 V 電源電壓-最大:+/- 5 V 電源電流: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube