參數(shù)資料
型號: OPA688P
英文描述: ECONOLINE: RB & RA - Dual Output from a Single Input Rail- Power Sharing on Output- Industry Standard Pinout- 1kVDC & 2kVDC Isolation- Custom Solutions Available- UL94V-0 Package Material- Efficiency to 85%
中文描述: 單位增益穩(wěn)定,寬帶電壓限幅放大器
文件頁數(shù): 4/16頁
文件大?。?/td> 185K
代理商: OPA688P
4
OPA688
INPUT
Common-Mode Rejection
Common-Mode Input Range
(4)
Input Impedance
Differential-Mode
Common-Mode
Input Referred, V
CM
=
±
0.5V
55
48
47
45
dB
V
Min
Min
A
A
V
CM
±
0.8
V
CM
±
0.7
V
CM
±
0.7
V
CM
±
0.6
0.4 || 1
1 || 1
M
|| pF
M
|| pF
Typ
Typ
C
C
OUTPUT
Output Voltage Range
Current Output, Sourcing
V
H
= V
CM
+1.8V, V
L
= = V
CM
–1.8V
R
L
500
V
O
= 2.5V
V
= 2.5V
G = +1, R
F
= 25
, f < 100kHz
V
CM
±
1.6
70
–60
0.2
V
CM
±
1.4
60
–50
V
CM
±
1.4
55
–45
V
CM
±
1.3
50
–40
V
Min
Min
Min
Typ
A
A
A
C
mA
mA
Sinking
Closed-Loop Output Impedance
POWER SUPPLY
Operating Voltage, Specified
Single Supply Operation
+5
13
13
+12
15
11
+12
15
10
+12
16
9
V
V
Typ
Max
Max
Min
C
A
A
A
Maximum
Quiescent Current, Maximum
mA
mA
Minimum
Power Supply Rejection Ratio
+PSR (Input Referred)
V
S
= 4.5V to 5.5V
65
dB
Typ
C
OUTPUT VOLTAGE LIMITERS
Default Limiter Voltage
Minimum Limiter Separation (V
H
– V
L
)
Maximum Limit Voltage
Limiter Input Bias Current Magnitude
(5)
Maximum
Minimum
Average Drift
Limiter Input Impedance
Limiter Feedthrough
(6)
DC Performance in Limit Mode
Limiter Voltage Accuracy
Op Amp Bias Current Shift
(3)
AC Performance in Limit Mode
Limiter Small Signal Bandwidth
Limiter Slew Rate
(7)
Limited Step Response
Overshoot
Recovery Time
Linearity Guardband
(8)
Pins 5 and 8
Limiter Pins Open
V
CM
±
0.9
200
V
CM
±
0.6
200
V
CM
±
1.8
V
CM
±
0.6
200
V
CM
±
1.8
V
CM
±
0.6
200
V
CM
±
1.8
V
Min
Min
Max
A
B
B
mV
V
V
O
= 2.5V
35
35
65
0
75
0
30
85
0
50
μ
A
μ
A
Max
Min
Max
Typ
Typ
A
A
B
C
C
nA/
°
C
M
|| pF
dB
2 || 1
–60
f = 5MHz
V
IN
= V
CM
±
1.2V
(V
O
– V
H
) or (V
O
– V
L
)
±
15
5
±
35
±
40
±
40
mV
μ
A
Max
Typ
A
C
V
IN
= V
CM
±
1.2V, V
O
< 0.02Vp-p
300
20
MHz
V/
μ
s
Typ
Typ
C
C
2x Overdrive
V
IN
= V
CM
to V
±
1.2V Step
V
IN
= V
CM
±
1.2V to V
CM
Step
f = 5MHz, V
O
= 2Vp-p
55
15
30
mV
ns
mV
Typ
Max
Max
C
C
C
THERMAL CHARACTERISTICS
Temperature Range
Thermal Resistance
P
8-Pin DIP
U
8-Pin SO-8
Specification: P, U
Junction-to-Ambient
–40 to +85
°
C
Typ
C
100
125
°
C/W
°
C/W
Typ
Typ
C
C
NOTES: (1) Junction Temperature = Ambient Temperature for low temperature limit and 25
°
C guaranteed specifications. Junction Temperature = Ambient
Temperature + 23
°
C at high temperature limit guaranteed specifications. (2) TEST LEVELS: (A) 100% tested at 25
°
C. Over temperature limits by characterization
and simulation. (B) Limits set by characterization and simulation. (C) Typical value for information only. (3) Current is considered positive out of node. (4) CMIR
tested as < 3dB degradation from minimum CMRR at specified limits. (5) I
VH
(V
H
bias current) is negative, and I
VL
(V
L
bias current) is positive, under these conditions.
See Note 3, Figures 2, and Figure 8. (6) Limiter feedthrough is the ratio of the output magnitude to the sinewave added to V
(or V
) when V
= 0. (7) V
slew
rate conditions are: V
IN
= V
CM
+0.4V, G = +2, V
L
= V
CM
–1.2V, V
H
= step between V
CM
+ 1.2V and V
CM
. V
L
slew rate conditions are similar. (8) Linearity Guardband
is defined for an output sinusoid (f = 5MHz, V
= V
±
1Vp-p) centered between the limiter levels (V
H
and V
L
). It is the difference between the limiter level and the
peak output voltage where SFDR decreases by 3dB (see Figure 9).
SPECIFICATIONS—V
S
= +5V
(CONT)
G = +2, R
L
= 500
tied to V
CM
= 2.5V, R
F
= 402
, V
L
= –1.2V, V
H
= +1.2V (Figure 2 for AC performance only), unless otherwise noted.
OPA688U, P
TYP
GUARANTEED
(1)
0
°
C to
+70
°
C
–40
°
C to
+85
°
C
MIN/
MAX
LEVEL
(2)
TEST
PARAMETER
CONDITIONS
+25
°
C
+25
°
C
UNITS
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