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參數(shù)資料
| 型號： | OPA688 |
| 元件分類： | 運動控制電子 |
| 英文描述： | Unity Gain Stable, Wideband VOLTAGE LIMITING AMPLIFIER |
| 中文描述： | 單位增益穩(wěn)定，寬帶電壓限幅放大器 |
| 文件頁數(shù)： | 14/16頁 |
| 文件大?。?/td> | 185K |
| 代理商： | OPA688 |
14
OPA688
f)
Use short direct traces to other wideband devices
on
the board. Short traces act as a lumped capacitive load. Wide
traces (50 to 100 mils) should be used. Estimate the total
capacitive load at the output, and use the series isolation
resistor recommended in the
R
S
vs Capacitive Load
plot.
Parasitic loads < 2pF may not need the isolation resistor.
g)
When long traces are necessary,
use transmission line
design techniques (consult an ECL design handbook for
microstrip and stripline layout techniques). A 50
transmis-
sion line is not required on board—a higher characteristic
impedance will help reduce output loading. Use a matching
series resistor at the output of the op amp to drive a
transmission line, and a matched load resistor at the other
end to make the line appear as a resistor. If the 6dB of
attenuation that the matched load produces is not acceptable,
and the line is not too long, use the series resistor at the
source only. This will isolate the source from the reactive
load presented by the line, but the frequency response will
be degraded.
Multiple destination devices are best handled as separate
transmission lines, each with its own series source and shunt
load terminations. Any parasitic impedances acting on the
terminating resistors will alter the transmission line match,
and can cause unwanted signal reflections and reactive
loading.
h)
Do not use sockets
for high speed parts like the OPA688.
The additional lead length and pin-to-pin capacitance intro-
duced by the socket creates an extremely troublesome para-
sitic network. Best results are obtained by soldering the part
onto the board. If socketing for DIP prototypes is desired,
high frequency flush mount pins (e.g., McKenzie Technol-
ogy #710C) can give good results.
POWER SUPPLIES
The OPA688 is nominally specified for operation using
either
±
5V supplies or a single +5V supply. The maximum
specified total supply voltage of 12V allows reasonable
tolerances on the supplies. Higher supply voltages can break
down internal junctions, possibly leading to catastrophic
failure. Single supply operation is possible as long as com-
mon mode voltage constraints are observed. The common
mode input and output voltage specifications can be inter-
preted as a required headroom to the supply voltage. Observ-
ing this input and output headroom requirement will allow
design of non-standard or single supply operation circuits.
Figure 2 shows one approach to single-supply operation.
ESD PROTECTION
ESD damage has been known to damage MOSFET devices,
but any semiconductor device is vulnerable to ESD damage.
This is particularly true for very high speed, fine geometry
processes.
ESD damage can cause subtle changes in amplifier input
characteristics without necessarily destroying the device. In
precision operational amplifiers, this may cause a noticeable
degradation of offset voltage and drift. Therefore, ESD
handling precautions are required when handling the OPA688.
OUTPUT LIMITERS
The output voltage is linearly dependent on the input(s)
when it is between the limiter voltages V
H
(pin 8) and V
L
(pin 5). When the output tries to exceed V
H
or V
L
, the
corresponding limiter buffer takes control of the output
voltage and holds it at V
H
or V
L
.
Because the limiters act on the output, their accuracy does
not change with gain. The transition from the linear region
of operation to output limiting is very sharp—the desired
output signal can safely come to within 30mV of V
H
or V
L
with no onset of non-linearity.
The limiter voltages can be set to within 0.7V of the supplies
(V
L
≥
–V
S
+ 0.7V, V
H
≤
+V
S
– 0.7V). They must also be at
least 200mV apart (V
H
– V
L
≥
0.2V).
When pins 5 and 8 are left open, V
H
and V
L
go to the
Default Voltage Limit; the minimum values are in the spec
table. Looking at Figure 8 for the zero bias current case will
show the expected range of (V
s
– default limit voltages) =
headroom.
When the limiter voltages are more than 2.1V from the
supplies (V
L
≥
–V
S
+ 2.1V or V
H
≤
+V
S
– 2.1V), you can use
simple resistor dividers to set V
H
and V
L
(see Figure 1).
Make sure you include the Limiter Input Bias Currents
(Figure 8) in the calculations (i.e., I
VL
≈
–50
μ
A out of pin 5,
and I
VH
≈
+50
μ
A out of pin 8). For good limiter voltage
accuracy, run at least 1mA quiescent bias current through
these resistors.
When the limiter voltages need to be within 2.1V of the
supplies (V
L
≤
–V
S
+ 2.1V or V
H
≥
+V
S
– 2.1V), consider
using low impedance buffers to set V
H
and V
L
to minimize
errors due to bias current uncertainty. This will typically be
the case for single supply operation (V
S
= +5V). Figure 2
runs 2.5mA through the resistive divider that sets V
H
and
V
L
. This keeps errors due to I
VH
and I
VL
<
±
1% of the target
limit voltages.
FIGURE 8. Limiter Bias Current vs Bias Voltage.
100
75
50
25
0
–25
–50
–75
–100
LIMITER INPUT BIAS CURRENT vs BIAS VOLTAGE
Limiter Headroom (V)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
L
μ
A
Maximum Over Temperature
Minimum Over Temperature
Limiter Headroom = +V
– V
H
Current = I
VH
or –I
VL
= V
L
– (–V
S
)
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相關(guān)代理商/技術(shù)參數(shù) |
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| OPA688M | 制造商:TI 制造商全稱:Texas Instruments 功能描述:UNITY-GAIN-STABLE WIDEBAND VOLTAGE LIMITING AMP LIFIER |
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| OPA688P | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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