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參數(shù)資料
| 型號(hào)： | OPA687U |
| 元件分類： | 運(yùn)算放大器 |
| 英文描述： | Wideband, Ultra-Low Noise, Voltage Feedback OPERATIONAL AMPLIFIER With Power Down |
| 中文描述： | 寬帶，超低噪聲，電壓反饋運(yùn)算放大器打倒電源 |
| 文件頁數(shù)： | 16/16頁 |
| 文件大?。?/td> | 172K |
| 代理商： | OPA687U |
16
OPA687
back resistor directly under the package on the other side of
the board between the output and inverting input pins. Even
with a low parasitic capacitance shunting the external resis-
tors, excessively high resistor values can create significant
time constants that can degrade performance. Good axial
metal-film or surface-mount resistors have approximately
0.2pF in shunt with the resistor. For resistor values > 2.0k
,
this parasitic capacitance can add a pole and/or a zero below
400MHz that can effect circuit operation. Keep resistor
values as low as possible, consistent with load driving
considerations. It has been suggested here that a good
starting point for design would be set the R
G
be set to 39.2
for non-inverting applications. Doing this will automatically
keep the resistor noise terms low, and minimize the effect of
their parasitic capacitance.
d)
Connections to other wideband devices on the board
may be made with short direct traces or through on-
board transmission lines.
For short connections, consider
the trace and the input to the next device as a lumped
capacitive load. Relatively wide traces (50mils to 100mils)
should be used, preferably with ground and power planes
opened up around them. Estimate the total capacitive load
and set R
S
from the plot of recommended R
S
vs Capacitive
Load. Low parasitic capacitive loads (< 4pF) may not need
an R
S
since the OPA687 is nominally compensated to
operate with a 2pF parasitic load. Higher parasitic cap. loads
without an R
S
are allowed as the signal gain increases
(increasing the unloaded phase margin). If a long trace is
required, and the 6dB signal loss intrinsic to a doubly-
terminated transmission line is acceptable, implement a
matched impedance transmission line using microstrip or
stripline techniques (consult an ECL design handbook for
microstrip and stripline layout techniques). A 50
environ-
ment is normally not necessary on board, and in fact, a
higher impedance environment will improve distortion as
shown in the distortion versus load plots. With a character-
istic board trace impedance defined based on board material
and trace dimensions, a matching series resistor into the
trace from the output of the OPA687 is used as well as a
terminating shunt resistor at the input of the destination
device. Remember also that the terminating impedance will
be the parallel combination of the shunt resistor and the
input impedance of the destination device: this total effec-
tive impedance should be set to match the trace impedance.
If the 6dB attenuation of a doubly terminated transmission
line is unacceptable, a long trace can be series-terminated at
the source end only. Treat the trace as a capacitive load in
this case and set the series resistor value as shown in the plot
of R
S
vs Capacitive Load. This will not preserve signal
integrity as well as a doubly-terminated line. If the input
impedance of the destination device is low, there will be
some signal attenuation due to the voltage divider formed by
the series output into the terminating impedance.
e) Socketing a high speed part like the OPA687 is not
recommended.
The additional lead length and pin-to-pin
capacitance introduced by the socket can create an ex-
tremely troublesome parasitic network which can make it
almost impossible to achieve a smooth, stable frequency
response. Best results are obtained by soldering the OPA687
onto the board.
INPUT AND ESD PROTECTION
The OPA687 is built using a very high speed complemen-
tary bipolar process. The internal junction breakdown volt-
ages are relatively low for these very small geometry de-
vices. These breakdowns are reflected in the Absolute Maxi-
mum Ratings table. All device pins are protected with
internal ESD protection diodes to the power supplies as
shown in Figure 10.
External
Pin
+V
CC
–V
CC
Internal
Circuitry
These diodes provide moderate protection to input overdrive
voltages above the supplies as well. The protection diodes
can typically support 30mA continuous current. Where higher
currents are possible (e.g., in systems with
±
15V supply
parts driving into the OPA687), current-limiting series resis-
tors should be added into the two inputs. Keep these resistor
values as low as possible since high values degrade both
noise performance and frequency response.
FIGURE 10. Internal ESD Protection.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| OPA687 | Wideband, Ultra-Low Noise, Voltage Feedback OPERATIONAL AMPLIFIER With Power Down |
| OPA688U | Unity Gain Stable, Wideband VOLTAGE LIMITING AMPLIFIER |
| OPA688P | ECONOLINE: RB & RA - Dual Output from a Single Input Rail- Power Sharing on Output- Industry Standard Pinout- 1kVDC & 2kVDC Isolation- Custom Solutions Available- UL94V-0 Package Material- Efficiency to 85% |
| OPA688 | Unity Gain Stable, Wideband VOLTAGE LIMITING AMPLIFIER |
| OPA689U | Wideband, High Gain VOLTAGE LIMITING AMPLIFIER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| OPA687U/2K5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Voltage-Feedback Operational Amplifier |
| OPA688 | 制造商:BB 制造商全稱:BB 功能描述:Unity Gain Stable, Wideband VOLTAGE LIMITING AMPLIFIER |
| OPA688M | 制造商:TI 制造商全稱:Texas Instruments 功能描述:UNITY-GAIN-STABLE WIDEBAND VOLTAGE LIMITING AMP LIFIER |
| OPA688MJD | 制造商:TI 制造商全稱:Texas Instruments 功能描述:UNITY-GAIN-STABLE WIDEBAND VOLTAGE LIMITING AMP LIFIER |
| OPA688P | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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