參數(shù)資料
型號: OPA682P
英文描述: Wideband, Fixed Gain BUFFER AMPLIFIER With Disable
中文描述: 寬帶,固定增益緩沖放大器具有禁用
文件頁數(shù): 20/20頁
文件大小: 213K
代理商: OPA682P
20
OPA682
d) Connections to other wideband devices on the board
may be made with short direct traces or through on-
board transmission lines.
For short connections, consider
the trace and the input to the next device as a lumped
capacitive load. Relatively wide traces (50mils to 100mils)
should be used, preferably with ground and power planes
opened up around them. Estimate the total capacitive load
and set R
S
from the plot of recommended R
S
vs Capacitive
Load. Low parasitic capacitive loads (< 5pF) may not need
an R
S
since the OPA682 is nominally compensated to
operate with a 2pF parasitic load. If a long trace is required,
and the 6dB signal loss intrinsic to a doubly-terminated
transmission line is acceptable, implement a matched im-
pedance transmission line using microstrip or stripline tech-
niques (consult an ECL design handbook for microstrip and
stripline layout techniques). A 50
environment is normally
not necessary on board, and in fact, a higher impedance
environment will improve distortion as shown in the Distor-
tion vs Load plots. With a characteristic board trace imped-
ance defined based on board material and trace dimensions,
a matching series resistor into the trace from the output of
the OPA682 is used as well as a terminating shunt resistor at
the input of the destination device. Remember also that the
terminating impedance will be the parallel combination of
the shunt resistor and the input impedance of the destination
device: this total effective impedance should be set to match
the trace impedance. The high output voltage and current
capability of the OPA682 allows multiple destination de-
vices to be handled as separate transmission lines, each with
their own series and shunt terminations. If the 6dB attenua-
tion of a doubly-terminated transmission line is unaccept-
able, a long trace can be series-terminated at the source end
only. Treat the trace as a capacitive load in this case and set
the series resistor value as shown in the plot of R
S
vs
Capacitive Load. This will not preserve signal integrity as
well as a doubly-terminated line. If the input impedance of
the destination device is low, there will be some signal
attenuation due to the voltage divider formed by the series
output into the terminating impedance.
e) Socketing a high speed part like the OPA682 is not
recommended.
The additional lead length and pin-to-pin
capacitance introduced by the socket can create an ex-
tremely troublesome parasitic network which can make it
almost impossible to achieve a smooth, stable frequency
response. Best results are obtained by soldering the OPA682
onto the board. If socketing for the DIP package is desired,
high frequency flush-mount pins (e.g., McKenzie Technol-
ogy #710C) can give good results.
INPUT AND ESD PROTECTION
The OPA682 is built using a very high speed complementary
bipolar process. The internal junction breakdown voltages
are relatively low for these very small geometry devices.
These breakdowns are reflected in the Absolute Maximum
Ratings table. All device pins have limited ESD protection
using internal diodes to the power supplies as shown in
Figure 10.
These diodes provide moderate protection to input overdrive
voltages above the supplies as well. The protection diodes
can typically support 30mA continuous current. Where higher
currents are possible (e.g., in systems with
±
15V supply
parts driving into the OPA682), current-limiting series resis-
tors should be added into the two inputs. Keep these resistor
values as low as possible since high values degrade both
noise performance and frequency response.
External
Pin
+V
CC
–V
CC
Internal
Circuitry
FIGURE 10. Internal ESD Protection.
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