
OPA681
3
SPECIFICATIONS: V
S
= +5V
R
F
= 499
, R
L
= 100
to V
S
/2, and G = +2
,
(Figure 2 for AC performance only), unless otherwise noted.
OPA681P, U, N
TYP
GUARANTEED
0
°
C to
70
°
C
(3)
–40
°
C to
+85
°
C
(3)
MIN/
MAX
LEVEL
(1)
TEST
PARAMETER
CONDITIONS
+25
°
C
+25
°
C
(2)
UNITS
AC PERFORMANCE (Figure 2)
Small-Signal Bandwidth (V
O
= 0.5Vp-p)
G = +1, R
F
= 649
G = +2, R
F
= 499
G = +5, R
F
= 360
G = +10, R
= 200
G = +2, V
O
< 0.5Vp-p
R
F
= 649
, V
O
< 0.5Vp-p
G = +2, V
= 2Vp-p
G = +2, 2V Step
G = +2, V
O
= 0.5V Step
G = +2, V
O
= 2V Step
G = +2, V
O
= 2V Step
G = +2, V
O
= 2V Step
G = +2, f = 5MHz, V
O
= 2Vp-p
R
L
= 100
to V
S
/2
R
L
≥
500
to V
S
/2
R
L
= 100
to V
S
/2
R
L
≥
500
to V
S
/2
f > 1MHz
f > 1MHz
f > 1MHz
250
225
180
165
100
0.4
200
830
1.5
2.0
14
9
MHz
MHz
MHz
MHz
MHz
dB
MHz
V/
μ
s
ns
ns
ns
ns
typ
min
typ
typ
min
max
typ
min
typ
typ
typ
typ
C
B
C
C
B
B
C
B
C
C
C
C
180
140
110
Bandwidth for 0.1dB Gain Flatness
Peaking at a Gain of +1
Large-Signal Bandwidth
Slew Rate
Rise/Fall Time
50
2
35
4
23
700
680
570
Settling Time to 0.02%
0.1%
Harmonic Distortion
2nd Harmonic
–70
–72
–72
–73
2.2
12
15
–68
–70
–65
–68
3
14
18
–67
–70
–65
–67
3.4
14
18
–63
–68
–62
–67
3.6
15
19
dBc
dBc
dBc
dBc
nV/
√
Hz
pA/
√
Hz
pA/
√
Hz
max
max
max
max
max
max
max
B
B
B
B
B
B
B
3rd Harmonic
Input Voltage Noise
Non-Inverting Input Current Noise
Inverting Input Current Noise
DC PERFORMANCE
(4)
Open-Loop Transimpedance Gain (Z
OL
)
Input Offset Voltage
Average Offset Voltage Drift
Non-Inverting Input Bias Current
Average Non-Inverting Input Bias Current Drift
Inverting Input Bias Current
Average Inverting Input Bias Current Drift
INPUT
Least Positive Input Voltage
(5)
Most Positive Input Voltage
(5)
Common-Mode Rejection Ratio (CMRR)
Non-Inverting Input Impedance
Min Inverting Input Resistance (R
I
)
Max Inverting Input Resistance (R
I
)
OUTPUT
Most Positive Output Voltage
V
O
= V
S
/2, R
L
= 100
to V
S
/2
V
CM
= 2.5V
V
CM
= 2.5V
V
CM
= 2.5V
V
CM
= 2.5V
V
CM
= 2.5V
V
CM
= 2.5V
100
±
1
60
±
5
53
±
6.0
+15
+75
–300
±
25
–125
51
±
7
+20
+95
–350
±
35
–175
k
mV
μ
V/
°
C
μ
A
nA/
°
C
μ
A
nA/
°
C
min
max
max
max
max
max
max
A
A
B
A
B
A
B
+40
+65
±
5
±
20
1.5
3.5
51
1.6
3.4
45
1.7
3.3
44
1.8
3.2
44
V
V
dB
max
min
min
typ
min
max
A
A
A
C
A
A
V
CM
= V
S
/2
100 || 2
46
46
k
|| pF
Open-Loop
Open-Loop
38
53
36
55
35
60
No Load
4
3.8
3.7
1.2
1.3
110
–75
3.7
3.6
1.3
1.4
110
–70
3.5
3.4
1.5
1.6
60
–50
V
V
V
V
min
min
max
max
min
min
typ
A
A
A
A
A
A
C
R
L
= 100
to V
S
/2
No Load
R
L
= 100
to V
S
/2
V
O
= V
S
/2
V
= V
/2
G = +2, f = 100kHz
3.9
1
1.1
150
–110
0.03
Least Positive Output Voltage
Current Output, Sourcing
Current Output, Sinking
Closed-Loop Output Impedance
DISABLE (Disable Low)
Power Down Supply Current (+V
S
)
Disable Time
Enable Time
Off Isolation
Output Capacitance in Disable
Turn On Glitch
Turn Off Glitch
Enable Voltage
Disable Voltage
Control Pin Input Bias Current (DIS)
POWER SUPPLY
Specified Single-Supply Operating Voltage
Max Single-Supply Operating Voltage
Max Quiescent Current
Min Quiescent Current
Power Supply Rejection Ratio (–PSRR)
TEMPERATURE RANGE
Specification: P, U, N
Thermal Resistance,
θ
JA
P
8-Pin DIP
U
SO-8
N
SOT23-6
mA
mA
V
DIS
= 0
–270
100
25
65
4
±
50
±
20
3.3
1.8
100
μ
A
ns
ns
dB
pF
mV
mV
V
V
μ
A
typ
typ
typ
typ
typ
typ
typ
min
max
typ
C
C
C
C
C
C
C
A
A
C
G = +2, 5MHz
G = +2, R
L
= 150
, V
IN
= V
S
/2
G = +2, R
L
= 150
, V
IN
= V
S
/2
3.5
1.7
3.6
1.6
3.7
1.5
V
DIS
= 0
5
V
V
typ
max
max
min
typ
C
A
A
A
C
12
5.3
4.1
12
5.4
3.7
12
5.4
3.6
V
S
= +5V
V
= +5V
Input Referred
10.0
10.0
48
mA
mA
dB
–40 to +85
°
C
typ
C
Junction-to-Ambient
100
125
150
°
C/W
°
C/W
°
C/W
typ
typ
typ
C
C
C
NOTES: (1) Test levels: (A) 100% tested at 25
°
C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and simulation.
(C) Typical value only for information. (2) Junction temperature = ambient for 25
°
C guaranteed specifications. (3) Junction temperature = ambient at low temperature
limit: junction temperature = ambient +23
°
C at high temperature limit for over temperature guaranteed specifications. (4) Current is considered positive out-of-node.
V
CM
is the input common-mode voltage. (5) Tested < 3dB below minimum specified CMR at
±
CMIR limits.