參數(shù)資料
型號(hào)： OPA634U
英文描述： Wideband, Single Supply OPERATIONAL AMPLIFIERS
中文描述： 寬帶，單電源運(yùn)算放大器
文件頁(yè)數(shù)： 15/17頁(yè)
文件大?。?/td> 179K
代理商： OPA634U
15
OPA634, OPA635
model, all noise terms are taken to be noise voltage or
current density terms in either nV/
√
Hz or pA/
√
Hz.
The total output spot noise voltage can be computed as the
square root of the sum of all squared output noise voltage
contributors. Equation 1 shows the general form for the
output noise voltage using the terms shown in Figure 6.
Equation 1:
Dividing this expression by the noise gain (NG = (1+R
F
/R
G
))
will give the equivalent input-referred spot noise voltage at
the non-inverting input, as shown in Equation 2.
Equation 2:
Evaluating these two equations for the circuit and compo-
nent values shown in Figure 1 will give a total output spot
noise voltage of 12.5nV/
√
Hz and a total equivalent input
spot noise voltage of 6.3nV/
√
Hz. This is including the noise
added by the resistors. This total input-referred spot noise
voltage is not much higher than the 5.6nV/
√
Hz specification
for the op amp voltage noise alone. This will be the case as
long as the impedances appearing at each op amp input are
limited to the previously recommend maximum value of
400
, and the input attenuation is low. Since the resistor-
induced noise is relatively negligible, additional capacitive
decoupling across the bias current cancellation resistor (R
T
)
for the inverting op amp configuration of Figure 5 is not
required.
DC ACCURACY AND OFFSET CONTROL
The balanced input stage of a wideband voltage feedback op
amp allows good output DC accuracy in a wide variety of
applications. The power supply current trim for the OPA634
and OPA635 gives even tighter control than comparable
products. Although the high speed input stage does require
relatively high input bias current (typically 25
μ
A out of each
input terminal), the close matching between them may be
used to reduce the output DC error caused by this current.
This is done by matching the DC source resistances appear-
ing at the two inputs. Evaluating the configuration of Figure
1 (which has matched DC input resistances), using worst-
case +25
°
C input offset voltage and current specifications,
gives a worst-case output offset voltage equal to: (NG = non-
inverting signal gain at DC)
±
(NG V
OS(MAX)
)
±
(R
F
I
OS(MAX)
)
=
±
(1 7.0mV)
±
(750
2.0
μ
A)
=
±
8.5mV
A fine scale output offset null, or DC operating point
adjustment, is often required. Numerous techniques are
available for introducing DC offset control into an op amp
circuit. Most of these techniques are based on adding a DC
current through the feedback resistor. In selecting an offset
trim method, one key consideration is the impact on the
desired signal path frequency response. If the signal path is
intended to be non-inverting, the offset control is best
applied as an inverting summing signal to avoid interaction
with the signal source. If the signal path is intended to be
inverting, applying the offset control to the non-inverting
input may be considered. Bring the DC offsetting current
into the inverting input node through resistor values that are
much larger than the signal path resistors. This will insure
that the adjustment circuit has minimal effect on the loop
gain and hence the frequency response.
DISABLE OPERATION
The OPA635 provides an optional disable feature that may
be used either to reduce system power or to implement a
simple channel multiplexing operation. To disable, the con-
trol pin must be asserted HIGH. Figure 7 shows a simplified
internal circuit for the disable control feature.
In normal operation, base current to Q1 is provided through
the 50k
resistor.
E
N
=
E
NI
2
+
I
BN
R
S
(
)
2
+ 4
kTR
S
+
I
BI
R
F
NG
2
+4
kTR
F
NG
E
O
=
E
NI
2
+
I
BN
R
S
(
)
2
+ 4
kTR
S
(
)
NG
2
+
I
BI
R
F
(
)
2
+ 4
kTR
F
NG
50k
I
S
Control
V
DIS
+V
S
Q1
FIGURE 7. Simplified Disable Control Circuit (OPA635).
One key parameter in disable operation is the output glitch
when switching in and out of the disabled mode.
The transition edge rate (dv/dt) of the DIS control line will
influence this glitch. Adding a simple RC filter into the DIS
pin from a higher speed logic line will reduce the glitch. If
extremely fast transition logic is used, a 1k
series resistor
will provide adequate bandlimiting using just the parasitic
input capacitance on the DIS pin while still ensuring ad-
equate logic level swing.
THERMAL ANALYSIS
Maximum desired junction temperature will set the maxi-
mum allowed internal power dissipation as described below.
In no case should the maximum junction temperature be
allowed to exceed 175
°
C.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
OPA634U/2K5 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Voltage-Feedback Operational Amplifier
OPA635 制造商:BB 制造商全稱(chēng):BB 功能描述:Wideband, Single Supply OPERATIONAL AMPLIFIERS
OPA635N 制造商:BB 制造商全稱(chēng):BB 功能描述:Wideband, Single Supply OPERATIONAL AMPLIFIERS
OPA635N/250 制造商:Rochester Electronics LLC 功能描述:- Bulk
OPA635N/3K 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Voltage-Feedback Operational Amplifier
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