
13
OPA631, OPA632
BANDWIDTH VS GAIN: NON-INVERTING OPERATION
Voltage feedback op amps exhibit decreasing closed-loop
bandwidth as the signal gain is increased. In theory, this
relationship is described by the Gain Bandwidth Product
(GBP) shown in the specifications. Ideally, dividing GBP by
the non-inverting signal gain (also called the Noise Gain, or
NG) will predict the closed-loop bandwidth. In practice, this
only holds true when the phase margin approaches 90
°
, as it
does in high gain configurations. At low gains (increased
feedback factors), most amplifiers will exhibit a more com-
plex response with lower phase margin. The OPA631 and
OPA632 are compensated to give a slightly peaked response
in a non-inverting gain of 2 (Figure 1). This results in a
typical gain of +2 bandwidth of 75MHz, far exceeding that
predicted by dividing the 68MHz GBP by 2. Increasing the
gain will cause the phase margin to approach 90
°
and the
bandwidth to more closely approach the predicted value of
(GBP/NG). At a gain of +10, the 7.6MHz bandwidth shown
in the Typical Specifications is close to that predicted using
the simple formula and the typical GBP.
The OPA631 and OPA632 exhibit minimal bandwidth re-
duction going to +3V single supply operation as compared
with +5V supply. This is because the internal bias control
circuitry retains nearly constant quiescent current as the total
supply voltage between the supply pins is changed.
INVERTING AMPLIFIER OPERATION
Since the OPA631 and OPA632 are general purpose,
wideband voltage feedback op amps, all of the familiar op
amp application circuits are available to the designer. Figure
5 shows a typical inverting configuration where the I/O
impedances and signal gain from Figure 1 are retained in an
inverting circuit configuration. Inverting operation is one of
the more common requirements and offers several perfor-
mance benefits. The inverting configuration shows improved
slew rate and distortion. It also allows the input to be biased
at V
S
/2 without any headroom issues. The output voltage can
be independently moved to be within the output voltage
range with coupling capacitors, or bias adjustment resistors.
In the inverting configuration, three key design consider-
ation must be noted. The first is that the gain resistor (R
G
)
becomes part of the signal channel input impedance. If input
impedance matching is desired (which is beneficial when-
ever the signal is coupled through a cable, twisted pair, long
PC board trace or other transmission line conductor), R
G
may be set equal to the required termination value and R
F
adjusted to give the desired gain. This is the simplest
approach and results in optimum bandwidth and noise per-
formance. However, at low inverting gains, the resultant
feedback resistor value can present a significant load to the
amplifier output. For an inverting gain of 2, setting R
G
to
50
for input matching eliminates the need for R
M
but
requires a 100
feedback resistor. This has the interesting
advantage that the noise gain becomes equal to 2 for a 50
source impedance—the same as the non-inverting circuits
considered above. However, the amplifier output will now
see the 100
feedback resistor in parallel with the external
load. In general, the feedback resistor should be limited to
the 200
to 1.5k
range. In this case, it is preferable to
increase both the R
F
and R
G
values as shown in Figure 5, and
then achieve the input matching impedance with a third
resistor (R
M
) to ground. The total input impedance becomes
the parallel combination of R
G
and R
M
.
The second major consideration, touched on in the previous
paragraph, is that the signal source impedance becomes
part of the noise gain equation and hence influences the
bandwidth. For the example in Figure 5, the R
M
value
combines in parallel with the external 50
source imped-
ance, yielding an effective driving impedance of 50
||
576
= 26.8
. This impedance is added in series with R
G
for calculating the noise gain. The resultant is 2.87 for
Figure 5, as opposed to only 2 if R
M
could be eliminated as
discussed above. The bandwidth will therefore be lower for
the gain of –2 circuit of Figure 5 (NG = +3) than for the
gain of +2 circuit of Figure 1.
The third important consideration in inverting amplifier
design is setting the bias current cancellation resistors on
the non-inverting input (a parallel combination of R
T
263
). If this resistor is set equal to the total DC resistance
looking out of the inverting node, the output DC error, due
to the input bias currents, will be reduced to (Input Offset
Current) R
F
. If the 50
source impedance is DC-coupled
in Figure 5, the total resistance to ground between the
inverting input and the source will be 401
. Combining
this in parallel with the feedback resistor gives the R
T
=
263
used in this example. To reduce the additional high
frequency noise introduced by this resistor, and power
supply feedthrough, R
T
is bypassed with a capacitor. As
long as R
T
< 400
, its noise contribution will be minimal.
As a minimum, the OPA631 and OPA632 require an R
T
FIGURE 5. Gain of –2 Example Circuit.
OPA63x
50
R
F
750
R
G
374
2R
T
523
R
M
57.6
Source
DIS
+5V
2R
T
523
R
O
50
0.1
μ
F
6.8
μ
F
+
0.1
μ
F
50
Load