參數(shù)資料
型號: OPA549T
元件分類: DC/DC變換器
英文描述: RxxPxx Series - Econoline Unregulated DC-DC Converters; Input Voltage (Vdc): 15V; Output Voltage (Vdc): 05V; Power: 1W; EN 60950 certified, rated for 250VAC; UL-60950-1 / CSA C22.2 certified; 5.2kVDC Isolation for 1 Minute; Optional Continuous Short Circuit Protected; 2 Chamber Transformer System; UL94V-0 Package Material; Efficiency to 80%
中文描述: 高電壓,大電流運算放大器
文件頁數(shù): 9/14頁
文件大?。?/td> 140K
代理商: OPA549T
9
OPA549
FIGURE 2. Adjustable Current Limit.
ENABLE/STATUS (E/S) PIN
The Enable/Status Pin provides two unique functions:
1) output disable by forcing the pin low and 2) thermal
shutdown indication by monitoring the voltage level at the
pin. Either or both of these functions can be utilized in an
application. For normal operation (output enabled), the E/S
pin can be left open or driven high (at least 2.4V above Ref).
A small value capacitor connected between the E/S pin and
C
REF
may be required for noisy applications.
Output Disable
To disable the output, the E/S pin is pulled to a logic low
(no greater than 0.8V above Ref). Typically the output is
shut down in 1
μ
s. To return the output to an enabled state,
the E/S pin should be disconnected (open) or pulled to at
least 2.4V above Ref. It should be noted that driving the E/
S pin high (output enabled)
does not defeat internal ther-
mal shutdown
; however, it does prevent the user from
monitoring the thermal shutdown status. See Figure 3 for
an example implementing this function.
This function not only conserves power during idle periods
(quiescent current drops to approximately 6mA) but also
allows multiplexing in multi-channel applications. Figure 12
shows two OPA549s in a switched amplifier configuration.
The on/off state of the two amplifiers is controlled by the
voltage on the E/S pin. Under these conditions, the disabled
device will behave like a 750pF load. Slewing faster than
3V/
μ
s will cause leakage current to rapidly increase in
devices that are disabled, and will contribute additional load.
At high temperature (125
°
C), the slewing threshold drops to
approximately 2V/
μ
s. Input signals must be limited to avoid
excessive slewing in multiplexed applications.
FIGURE 3. Output Disable.
OPA549
E/S
CMOS or TTL
Ref
Logic
Ground
7500
R
CL
0.01
μ
F
(optional, for noisy
environments)
8
6
8
6
4.75V
R
CL
=15800 (4.75V)
– 7500
LIM
OPA549 CURRENT LIMIT: 0A to 10A
NOTES: (1) Resistors are nearest standard 1% values. (2) Offset in the current limit circuitry
may introduce approximately
±
0.25A variation at low current limit values.
DESIRED
CURRENT LIMIT
0A
(2)
2.5A
3A
4A
5A
6A
7A
8A
9A
10A
RESISTOR
(1)
(R
CL
)
I
LIM
Open
22.6k
17.4k
11.3k
7.5k
4.99k
3.24k
1.87k
845
I
LIM
Connected to Ref
CURRENT
(I
SET
)
0
μ
A
158
μ
A
190
μ
A
253
μ
A
316
μ
A
380
μ
A
443
μ
A
506
μ
A
570
μ
A
633
μ
A
VOLTAGE
(V
SET
)
(Ref) + 4.75V
(Ref) + 3.56V
(Ref) + 3.33V
(Ref) + 2.85V
(Ref) + 2.38V
(Ref) + 1.90V
(Ref) + 1.43V
(Ref) + 0.95V
(Ref) + 0.48V
(Ref)
(a) RESISTOR METHOD
= I
– 7.5k
LIM
75k
7500
I
SET
= I
LIM
/15800
V
SET
= (Ref) + 4.75V – (7500
) (I
LIM
)/15800
(b) DAC METHOD (Current or Voltage)
D/A
I
SET
4.75V
Ref
Ref
±
I
LIM
=
Max I
O
= I
LIM
(4.75) (15800)
7500
+ R
CL
Max I
O
= I
LIM
±
I
LIM
=15800
I
SET
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