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參數(shù)資料
| 型號： | OPA3680E |
| 英文描述： | Triple, Wideband, Voltage-Feedback OPERATIONAL AMPLIFIER With Disable |
| 中文描述： | 三，寬帶，電壓反饋運算放大器，禁用 |
| 文件頁數(shù)： | 3/21頁 |
| 文件大?。?/td> | 225K |
| 代理商： | OPA3680E |
3
OPA3680
SPECIFICATIONS: V
S
= +5V
R
F
= 250
, R
L
= 100
to V
S
/2, G = +2
,
(Figure 2 for AC performance only), R
F
= 25
for G = +1, unless otherwise noted.
OPA3680E, U
TYP
GUARANTEED
0
°
C to
70
°
C
(3)
–40
°
C to
+85
°
C
(3)
MIN/
MAX
TEST
LEVEL
(1)
PARAMETER
CONDITIONS
+25
°
C
+25
°
C
(2)
UNITS
AC PERFORMANCE (Figure 2)
Small-Signal Bandwidth
G = +1, V
O
< 0.5Vp-p
G = +2, V
O
< 0.5Vp-p
G = +10, V
O
< 0.5Vp-p
G
≥
10
G = +2, V
< 0.5Vp-p
V
< 0.5Vp-p
G = +2, V
= 2Vp-p
G = +2, 2V Step
G = +2, V
O
= 0.5V Step
G = +2, V
O
= 2V Step
G = +2, V
O
= 2V Step
G = +2, V
O
= 2V Step
G = +2, f = 5MHz, V
O
= 2Vp-p
R
L
= 100
R
L
≥
500
R
L
= 100
R
≥
500
f > 1MHz
f > 1MHz
G = +2, NTSC, V
O
= 1.4Vp, R
L
= 150 to V
S
/2
G = +2, NTSC, V
O
= 1.4Vp, R
L
= 150 to V
S
/2
300
220
25
250
20
5
175
1000
1.6
2.0
12
8
MHz
MHz
MHz
MHz
MHz
dB
MHz
V/
μ
s
ns
ns
ns
ns
typ
min
min
min
typ
typ
typ
min
typ
typ
typ
typ
C
B
C
B
C
C
C
B
C
C
C
C
160
20
200
160
19
190
140
18
180
Gain Bandwidth Product
Bandwidth for 0.1dB Gain Flatness
Peaking at a Gain of +1
Large-Signal Bandwidth
Slew Rate
Rise Time
Fall Time
Settling Time to 0.02%
0.1%
Harmonic Distortion
2nd Harmonic
700
670
550
–70
–80
–71
–84
5
2.5
0.06
0.03
dBc
dBc
dBc
dBc
nV/
√
Hz
pA/
√
Hz
%
deg
typ
typ
typ
typ
max
max
typ
typ
C
C
C
C
B
B
C
C
3rd Harmonic
Input Voltage Noise
Input Current Noise
Differential Gain
Differential Phase
DC PERFORMANCE
(4)
Open-Loop Voltage Gain (A
OL
)
Input Offset Voltage
Average Offset Voltage Drift
Input Bias Current
Average Bias Current Drift (magnitude)
Input Offset Current
Average Offset Current Drift
INPUT
Least Positive Input Voltage
(5)
Most Positive Input Voltage
(5)
Common-Mode Rejection Ratio (CMRR)
Input Impedance
Differential-Mode
Common-Mode
OUTPUT
Most Positive Output Voltage
5.5
3
6
6.2
3.4
3.5
V
O
= 0V, R
= 100
V
CM
= 2.5V
V
CM
= 2.5V
V
CM
= 2.5V
V
CM
= 2.5V
V
CM
= 2.5V
V
CM
= 2.5V
58
±
1.0
54
±
6.5
52
±
7.5
–10
+21
–52
±
1.0
±
0.5
50
±
9.0
–12
+37
–80
±
1.2
±
1.0
dB
mV
μ
V/
°
C
μ
A
nA/
°
C
μ
A
nA/
°
C
min
max
max
max
max
max
max
A
A
B
A
B
A
B
+8
+16
±
0.1
±
0.7
1.5
3.5
59
1.6
3.4
56
1.7
3.3
53
1.8
3.2
52
V
V
dB
min
max
min
A
A
A
V
CM
= 2.5V
92 || 1.4
2.2 || 1.5
k
|| pF
M
|| pF
typ
typ
C
C
No Load
R
L
= 100
, 2.5V
No Load
R
L
= 100
, 2.5V
4
3.8
3.7
1.2
1.3
+110
–80
3.6
3.5
1.4
1.5
+110
–70
3.5
3.4
1.5
1.7
+60
–50
V
V
V
V
min
min
min
min
min
min
typ
A
A
A
A
A
A
C
3.9
1
1.1
+150
–110
0.03
Least Positive Output Voltage
Current Output, Sourcing
Current Output, Sinking
Closed-Loop Output Impedance
DISABLE
Power-Down Supply Current (+V
S
)
Disable Time
Enable Time
Off Isolation
Output Capacitance in Disable
Turn On Glitch
Turn Off Glitch
Enable Voltage
Disable Voltage
Control Pin Input Bias Current
POWER SUPPLY
Specified Single Supply Operating Voltage
Maximum Single Supply Operating Voltage
Max Quiescent Current
Min Quiescent Current
Power Supply Rejection Ratio
(+PSRR)
TEMPERATURE RANGE
Specification: U, E
Thermal Resistance,
θ
JA
U
SO-16
E
SSOP-16
mA
mA
G = +2, f = 100kHz
Disable Low
V
DIS
= 0V, Each Channel
–250
100
25
65
4
±
50
±
20
3.3
1.8
100
μ
A
ns
ns
dB
pF
mV
mV
V
V
μ
A
typ
typ
typ
typ
typ
typ
typ
min
max
typ
C
C
C
C
C
C
C
A
A
C
G = +2, 5MHz
G = +2, R
L
= 150
, V
IN
= V
S
/2
G = +2, R
LP
= 150
, V
IN
= V
S
/2
3.5
1.7
3.6
1.6
3.7
1.5
V
DIS
= 0V
5
V
V
typ
max
max
min
typ
C
A
A
A
C
12
6.0
4.0
12
6.0
4.0
12
6.0
3.8
V
S
= +5V, Each Channel
V
S
= +5V, Each Channel
Input Referred
5.1
5.1
55
mA
mA
dB
–40 to +85
°
C
typ
C
100
100
°
C/W
°
C/W
typ
typ
C
C
NOTES: (1) Test Levels: (A) 100% tested at 25
°
C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and simulation.
(C) Typical value only for information. (2) Junction temperature = ambient for 25
°
C guaranteed specifications. (3) Junction temperature = ambient at low temperature
limit: junction temperature = ambient +23
°
C at high temperature limit for over temperature guaranteed specifications. (4) Current is considered positive out-of-node.
V
CM
is the input common-mode voltage. (5) Tested < 3dB below minimum CMR specification at
±
CMIR limits.
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