參數(shù)資料
型號: OPA301AIDR
英文描述: Low-Noise, High-Speed, 16-Bit Accurate, CMOS OPERATIONAL AMPLIFIER
中文描述: 低噪聲,高速,16位精度,CMOS運算放大器
文件頁數(shù): 10/15頁
文件大?。?/td> 302K
代理商: OPA301AIDR
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SBOS271A MAY 2003 REVISED DECEMBER 2003
APPLICATIONS INFORMATION
www.ti.com
10
Built on HPA07, the latest TI high-precision analog
process, the OPA300 single-supply CMOS op amp is
designed
to
interface with high-speed 16-bit
analog-to-digital converters (ADCs). Featuring wide
150MHz bandwidth, fast 150nS settling time to 16 bits,
and high open loop gain, the OPA300 series offer
excellent performance in a small SO-8 and tiny SOT23
packages.
THEORY OF OPERATION
The OPA30x uses a classic two-stage topology, shown
in Figure 1. The differential input pair is biased to
maximize slew rate without compromising stability or
bandwidth. The folded cascode adds the signal from the
input pair and presents a differential signal to the class
AB output stage. The class AB output stage allows rail
to rail output swing, with highimpedance loads
(> 2k
), typically 100mV from the supply rails. With 10
loads, a useful output swing can be achieved and still
maintain high open-loop gain. See the typical
characteristic
Output Voltage Swing vs Output Current.
+V
S
V
BIAS
+
V
IN
V
OUT
Figure 1. OPA30x Classic Two-Stage Topology
OPERATING VOLTAGE
OPA30x op amp parameters are fully specified from
+2.7V to +5.5V. Supply voltages higher than 5.5V
(absolute maximum) can cause permanent damage to
the amplifier. Many specifications apply from –40
°
C to
+125
°
C. Parameters that vary significantly with
operating voltages or temperature are shown in the
Typical Characteristics.
PCB LAYOUT
As with most high-speed operational amplifiers, board
layout requires special attention to maximize AC and
DC performance. Extensive use of ground planes, short
lead lengths, and high-quality bypass capacitors will
minimize leakage that can compromise signal quality.
Guard rings applied with potential as near to the input
pins as possible help minimize board leakage.
INPUT AND ESD PROTECTION
All OPA30x pins are static protected with internal ESD
protection diodes tied to the supplies, as shown in
Figure 2. These diodes will provide overdrive protection
if the current is externally limited to 10mA, as stated in
the Absolute Maximum Ratings. Any input current
beyond the Absolute Maximum Ratings, or long-term
operation at maximum ratings, will shorten the lifespan
of the amplifier.
External
Pin
+V
V
Internal
Circuitry
Figure 2. ESD Protection Diodes
ENABLE FUNCTION
The shutdown function of the OPA300 is referenced to
the negative supply voltage of the operational amplifier.
A logic level HIGH enables the op amp. A valid logic
HIGH is defined as 2.5V above the negative supply
applied to the enable pin. A valid logic LOW is defined
as < 0.8V above the negative supply pin. If dual or split
power supplies are used, care should be taken to
ensure logic input signals are properly referred to the
negative supply voltage. If this pin is not connected to
a valid high to low voltage, the internal circuitry will pull
the node high and enable the part to function.
The logic input is a high-impedance CMOS input. For
battery-operated applications, this feature may be used
to greatly reduce the average current and extend
battery life. The enable time is 10
μ
s; disable time is 1
μ
s.
When disabled, the output assumes a high-impedance
state. This allows the OPA300 to be operated as a gated
amplifier, or to have its output multiplexed onto a
common analog output bus.
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