OP193/OP293/OP493
REV. A
–9–
G
60
40
10 100 1k 10k 100k
0
–20
T
A
= +25
°
C
V
S
=
±
15V
FREQUENCY – Hz
20
Figure 19. Closed-Loop Gain vs.
Frequency, V
S
=
±
15 V
G
60
40
100 1k 10k 100k 1M
0
–20
V
S
=
±
15V
FREQUENCY – Hz
20
PHASE
–40
GAIN
P
90
0
–45
45
–90
Figure 22. Open Loop, Gain and
Phase vs. Frequency
60
50
40
20
10 100 1000 10000
CAPACITIVE LOAD – pF
30
10
0
O
V
S
= +5V T
A
= +25
°
C
A
= 1
50mV
≤
V
≤
150mV
LOADS TO GND
+OS
R
L
=
∞
+OS =
|
–OS
|
R
L
= 10k
+OS = |
–OS
|
R
L
= 50k
–OS
R
L
=
∞
Figure 20. Small Signal Overshoot
vs. Capacitive Load
G
60
40
100 1k 10k 100k 1M
FREQUENCY – Hz
Figure 21. Open Loop, Gain and
Phase vs. Frequency
0
–20
V
S
= +5V
20
PHASE
–40
GAIN
P
90
0
–45
45
–90
FUNCT IONAL DE SCRIPT ION
T he OP193 family of operational amplifiers are single-supply,
micropower, precision amplifiers whose input and output ranges
both include ground. Input offset voltage (V
OS
) is only 75
μ
V
maximum, while the output will deliver
±
5 mA to a load. Sup-
ply current is only 17
μ
A.
A simplified schematic of the input stage is shown in Figure 23.
Input transistors Q1 and Q2 are PNP devices, which permit the
inputs to operate down to ground potential. T he input transis-
tors have resistors in series with the base terminals to protect the
junctions from over voltage conditions. T he second stage is an
NPN cascode which is buffered by an emitter follower before
driving the final PNP gain stage.
T he OP193 includes connections to taps on the input load resis-
tors, which can be used to null the input offset voltage, V
OS
.
T he OP293 and OP493 have two additional transistors, Q7 and
Q8. T he behavior of these transistors is discussed in the Output
Phase Reversal section of this data sheet.
T he output stage, shown in Figure 24, is a noninverting NPN
“totem-pole” configuration. Current is sourced to the load by
emitter follower Q1, while Q2 provides current sink capability.
When Q2 saturates, the output is pulled to within 5 mV of
ground without an external pull-down resistor. T he totem-pole
output stage will supply a minimum of 5 mA to an external
load, even when operating from a single 3.0 V power supply.
By operating as an emitter follower, Q1 offers a high impedance
load to the final PNP collector of the input stage. Base drive to
Q2 is derived by monitoring Q1’s collector current. T ransistor
Q5 tracks the collector current of Q1. When Q1 is on, Q5 keeps
Q4 off, and current source I1 keeps Q2 turned off. When Q1 is
driven to cutoff (i.e., the output must move toward V–), Q5
allows Q4 to turn on. Q4’s collector current then provides the
base drive for Q3 and Q2, and the output low voltage swing is
set by Q2’s V
CE,SAT
which is about 5 mV.
2k
NULLING
TERMINALS
(OP193 ONLY)
+INPUT
R2
A
2k
–INPUT
Q1
Q2
Q7
Q8
Q3
Q4
R2
B
R1
B
R1
A
OP293,
OP493
ONLY
I
1
D1
I
2
I
3
I
4
Q5
Q6
TO
OUTPUT
STAGE
I
5
I
6
V–
V+
Figure 23. OP193/OP293/OP493 Equivalent Input Circuit
Q4
Q1
Q5
Q3
Q2
OUTPUT
I
1
I
2
I
3
FROM
INPUT
STAGE
V+
V–
Figure 24. OP193/OP293/OP493 Equivalent Output Circuit