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REV. A
–3–
OP471
OP471E
Min
Typ Max
OP471F
Min Typ Max
OP471G
Min Typ Max
Parameter
Symbol
Conditions
Unit
Input Offset Voltage
V
OS
TCV
OS
0.3
1.1
0.6
2.0
1.2
2.5
mV
m
V/
∞
C
Average Input
Offset Voltage Drift
1
4
2
7
4
Input Offset Current
los
V
CM
= 0 V
V
CM
= 0 V
V
O
=
±
10 V
R
L
= 10 k
W
R
L
= 2 k
W
5
20
8
40
20
50
nA
Input Bias Current
I
B
13
50
25
70
40
75
nA
Large-Signal
Voltage Gain
Avo
375
250
±
11
±
12
100
600
400
±
12
±
13
115
200
125
±
11
±
12
±
12
±
13
90
400
200
200
125
±
11
±
12
±
12
±
13
90
400
200
V/mV
Input Voltage Range
*
IVR
V
Output Voltage Swing
V
O
CMR
R
L
≥
2 k
W
V
CM
=
±
11 V
V
Common-Mode
Rejection
110
110
dB
Power Supply
Rejection Ratio
PSRR
V
S
=
±
4.5 V to
±
18 V
3.2
10
18
31.6
18
31.6
m
V/V
Supply Current
(All Amplifiers)
I
SY
No Load
9.3
11
9.3
11
9.3
11
mA
*
Guaranteed by CMR test.
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
18 V
Differential Input Voltage
2
. . . . . . . . . . . . . . . . . . . . . .
±
1.0 V
Differential Input Current
2
. . . . . . . . . . . . . . . . . . . .
±
25 mW
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage
Output Short-Circuit Duration . . . . . . . . . . . . . . .Continuous
Storage Temperature Range
P, Y-Package . . . . . . . . . . . . . . . . . . . . . . –65
∞
C to +150
∞
C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300
∞
C
Junction Temperature (T
i
) . . . . . . . . . . . . . –65
∞
C to +150
∞
C
Operating Temperature Range
OP471E, OP471F . . . . . . . . . . . . . . . . . . . –25
∞
C to +85
∞
C
OP471G . . . . . . . . . . . . . . . . . . . . . . . . . . . –40
∞
C to +85
∞
C
NOTES
1
Absolute Maximum Ratings apply to packaged parts, unless otherwise noted.
2
The OP471’s inputs are protected by back-to-back diodes. Current limiting
resistors are not used in order to achieve low noise performance. If differential
voltage exceeds
±
1.0 V, the input current should be limited to
±
25 mA.
Package Type
JA
*
94
JC
Unit
∞
C/W
∞
C/W
∞
C/W
14-Lead Hermetic DIP(Y)
10
14-Lead Plastic DIP(P)
76
33
16-Lead SOIC (S)
88
23
*
is specified for worst-case mounting conditions, i.e.,
is specified for device
in socket for TO, CERDIP, PDIP packages;
JA
is specified for device soldered to
printed circuit board for SO packages.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the OP471 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions
are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ORDERING GUIDE
T
A
= 25
∞
C
V
OS
MAX
(
m
V)
800
1,500
1,800
1,800
Package Options
Operating
Temperature
Range
IND
IND
XIND
XIND
14-Lead CERDIP Plastic
OP471EY
OP471FY
*
OP471GP
OP471GS
*
Not for new design. Obsolete April 2002.
For military processed devices, please refer to the standard
microcircuit drawing (SMD) available at
www.dscc.dla.mil/programs/milspec/default.asp
5962-88565022A - OP471ARCMDA
5962-88565023A - OP471ATCMDA
5962-8856502CA - OP471AYMDA
ELECTRICAL CHARACTERISTICS
(V
s
=
±
15 V, –25C
£
T
A
£
85 C for OP471E/F, –40 C
£
T
A
£
85 for OP471G,
unless otherwise noted.)