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參數(shù)資料
| 型號： | OP470EY |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP GP 6MHZ QUAD LN 14CDIP |
| 標準包裝： | 25 |
| 放大器類型： | 通用 |
| 電路數(shù)： | 4 |
| 轉(zhuǎn)換速率： | 2 V/µs |
| 增益帶寬積： | 6MHz |
| 電流 - 輸入偏壓： | 6nA |
| 電壓 - 輸入偏移： | 100µV |
| 電流 - 電源： | 9mA |
| 電壓 - 電源，單路/雙路(±)： | 9 V ~ 36 V，±4.5 V ~ 18 V |
| 工作溫度： | -25°C ~ 85°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 14-CDIP（0.300"，7.62mm） |
| 供應商設備封裝： | 14-CERDIP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 772 (CN2011-ZH PDF) |
REV. B
OP470
–11–
4. The test time to measure 0.1 Hz to 10 Hz noise should not ex-
ceed 10 seconds. As shown in the noise-tester frequency-response
curve of Figure 8, the 0.1 Hz corner is defined by only one pole.
The test time of 10 seconds acts as an additional pole to elimi-
nate noise contribution from the frequency band below 0.1 Hz.
5. A noise-voltage-density test is recommended when measuring
noise on a large number of units. A 10 Hz noise voltage-density
measurement will correlate well with a 0.1 Hz to 10 Hz
peak-to-peak noise reading, since both results are determined
by the white noise and the location of the 1/f corner frequency.
6. Power should be supplied to the test circuit by well bypassed
low noise supplies, e.g. batteries. These will minimize output
noise introduced via the amplifier supply pins.
FREQUENCY – Hz
100
0.01
GAIN
–
dB
80
60
40
20
0
0.1
1
10
100
Figure 8. 0.1 Hz to 10 Hz Peak-to-Peak Voltage Noise Test
Circuit Frequency Response
NOISE MEASUREMENT—NOISE VOLTAGE DENSITY
The circuit of Figure 9 shows a quick and reliable method of
measuring the noise voltage density of quad op amps. Each
individual amplifier is series-connected and is in unity-gain, save
the final amplifier which is in a noninverting gain of 101. Since
the ac noise voltages of each amplifier are uncorrelated, they
add in rms fashion to yield:
e= 101
e
+ e
e
OUT
nA
nB
nC
nD
22
2
++
The OP470 is a monolithic device with four identical amplifiers.
The noise voltage density of each individual amplifier will match,
giving:
e
101
4e
= 101 2e
OUT
n
2
=
()
NOISE MEASUREMENT—CURRENT NOISE DENSITY
The test circuit shown in Figure 10 can be used to measure
current noise density. The formula relating the voltage output to
current noise density is:
i
G
40nV /
Hz
R
n
nOUT
S
=
-
()
2
where:
G = gain of 10000
RS = 100 k
W source resistance
R2
100k
R3
1.24k
OP470
DUT
R5
8.06k
OP27E
R4
200
en OUT TO
SPECTRUM ANALYZER
R1
5
GAIN = 50,000
VS = 5V
Figure 10. Current Noise Density Test Circuit
R2
10k
1/4
OP470
1/4
OP470
1/4
OP470
1/4
OP470
R1
100
eOUT
TO SPECTRUM ANALYZER
eOUT (nV Hz) = 101(2en)
VS = 15V
Figure 9. Noise Voltage Density Test Circuit
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| OP-470EY | 制造商:AD 制造商全稱:Analog Devices 功能描述:VERY LOW NOISE QUAD OPERATIONAL AMPLIFIER |
| OP470FY | 制造商:Analog Devices 功能描述: |
| OP-470FY | 制造商:AD 制造商全稱:Analog Devices 功能描述:VERY LOW NOISE QUAD OPERATIONAL AMPLIFIER |
| OP470G | 制造商:Analog Devices 功能描述: |
| OP-470G | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Dual/Quad Low Noise, Precision Operational Amplifiers |
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