參數(shù)資料
型號: OP283
廠商: Analog Devices, Inc.
英文描述: 5 MHz Single-Supply Operational Amplifiers(5MHz單電源運算放大器)
中文描述: 5 MHz的單電源運算放大器(5MHz的單電源運算放大器)
文件頁數(shù): 3/12頁
文件大?。?/td> 423K
代理商: OP283
REV.B
ELECTRICAL CHARACTERISTICS
Parameter
Symbol
C onditions
Min
T yp
Max
Units
INPUT CHARACT ERIST ICS
Offset Voltage
V
OS
0.01
1.0
1.25
600
750
±
50
+13.5
mV
mV
nA
nA
nA
V
–40
°
C
T
A
+85
°
C
Input Bias Current
I
B
300
400
11
–40
°
C
T
A
+85
°
C
–40
T
A
+85
°
C
Input Offset Current
Input Voltage Range
Common-Mode Rejection Ratio
I
OS
–15
CMRR
V
CM
= –15 V to +13.5 V,
–40
°
C
T
A
+85
°
C
R
L
= 2 k
70
100
86
1000
3
–1.6
dB
V/mV
μ
V/
°
C
nA/
°
C
mV
Large Signal Voltage Gain
Offset Voltage Drift
Bias Current Drift
Long T erm Offset Voltage
A
VO
V
OS
/
T
I
B
/
T
V
OS
Note 1
1.5
OUT PUT CHARACT ERIST ICS
Output Voltage High
Output Voltage Low
Short-Circuit Limit
V
OH
V
OL
I
SC
R
L
= 2 k
to GND, –40
°
C
T
A
+85
°
C
R
L
= 2 k
to GND, –40
°
C
T
A
+85
°
C
Source
Sink
f = 1 MHz, A
V
= +1
+13.9 14.1
V
V
mA
mA
–14.05
30
50
15
–13.9
Open -Loop Output Impedance
Z
OUT
POWER SUPPLY
Power Supply Rejection Ratio
PSRR
V
=
±
2.5 V to
±
18 V,
–40
°
C
T
+85
°
C
V
S
=
±
18 V, V
O
= 0 V,
–40
°
C
T
A
+85
°
C
70
112
dB
Supply Current/Amplifier
I
SY
1.2
1.75
±
18
mA
V
Supply Voltage Range
V
S
+3
DYNAMIC PERFORMANCE
Slew Rate
Full-Power Bandwidth
Settling T ime
Gain Bandwidth Product
Phase Margin
SR
BW
p
t
S
GBP
φ
m
R
L
= 2 k
1% Distortion
T o 0.01%
10
15
50
1.5
5
56
V/
μ
s
kHz
μ
s
MHz
degrees
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
e
n p-p
e
n
i
n
0.1 Hz to 10 Hz
f = 1 kHz
2
10
0.4
μ
V p-p
nV/
Hz
pA/
Hz
NOT ES
1
Long term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at +125
°
C, with an LT PD of 1.3.
Specifications subject to change without notice.
WAFER TEST LIMTS
(@ V
S
= +5.0 V, T
A
= +25
8
C unless otherwse noted)
(@ V
S
=
6
15.0 V, T
A
= +25
8
C unless otherwse noted)
Parameter
Symbol
C onditions
Limit
Units
Offset Voltage
Input Bias Current
Input Offset Current
Common-Mode Rejection
Power Supply Rejection Ratio
Large Signal Voltage Gain
Output Voltage High
Output Voltage Low
Supply Current/Amplifier
V
OS
I
B
I
OS
CMRR
PSRR
A
VO
V
OH
V
OL
I
SY
V
S
=
±
15 V, V
O
= 0 V
V
CM
= 2.5 V
V
CM
= 2.5 V
V
= 0 V to 3.5 V
V =
±
2.5 V to
±
18 V
R
L
= 2 k
, 0.2
V
O
3.8 V
R
L
= 2 k
R
L
= 2 k
V
S
=
±
15 V, V
O
= 0 V, R
L
=
1.0
±
600
±
50
70
70
100
4.0
75
1.5
mV max
nA max
nA max
dB min
dB min
V/mV min
V min
mV max
mA max
NOT E
Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard
product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
OP183/OP283
–3–
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