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參數(shù)資料
| 型號： | OP27GSZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/20頁 |
| 文件大小： | 0K |
| 描述： | IC OPAMP GP 8MHZ LN PREC 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 放大器類型： | 通用 |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 2.8 V/µs |
| 增益帶寬積： | 8MHz |
| 電流 - 輸入偏壓： | 15nA |
| 電壓 - 輸入偏移： | 30µV |
| 電壓 - 電源，單路/雙路(±)： | ±4 V ~ 18 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SO |
| 包裝： | 帶卷 (TR) |
OP27
Rev. F | Page 14 of 20
APPLICATION INFORMATION
OP27 series units can be inserted directly into OP07 sockets
with or without removal of external compensation or nulling
components. Additionally, the OP27 can be fitted to unnulled
circuitry is in use, it should be modified or removed to ensure
correct OP27 operation. OP27 offset voltage can be nulled to
0 (or another desired setting) using a potentiometer (see
The OP27 provides stable operation with load capacitances of
up to 2000 pF and ±10 V swings; larger capacitances should be
decoupled with a 50 Ω resistor inside the feedback loop. The
OP27 is unity-gain stable.
Thermoelectric voltages generated by dissimilar metals at the
input terminal contacts can degrade the drift performance.
Best operation is obtained when both input contacts are
maintained at the same temperature.
+
–-
OP27
V–
V+
OUTPUT
RP
10k
Ω
1
7
6
4
8
3
2
00317-035
Figure 35. Offset Nulling Circuit
OFFSET VOLTAGE ADJUSTMENT
The input offset voltage of the OP27 is trimmed at wafer level.
However, if further adjustment of VOS is necessary, a 10 kΩ trim
Other potentiometer values from 1 kΩ to 1 MΩ can be used
with a slight degradation (0.1 μV/°C to 0.2 μV/°C) of TCVOS.
Trimming to a value other than zero creates a drift of approxi-
mately (VOS/300) μV/°C. For example, the change in TCVOS is
0.33 μV/°C if VOS is adjusted to 100 μV. The offset voltage
adjustment range with a 10 kΩ potentiometer is ±4 mV. If smaller
adjustment range is required, the nulling sensitivity can be
reduced by using a smaller potentiometer in conjunction with
fixed resistors. For example, Figure 36 shows a network that has
a 280 μV adjustment range.
1
8
4.7k
Ω
4.7k
Ω
1k
Ω POTT
V+
00317-036
Figure 36. Offset Voltage Adjustment
NOISE MEASUREMENTS
To measure the 80 nV p-p noise specification of the OP27 in
the 0.1 Hz to 10 Hz range, the following precautions must be
observed:
The device must be warmed up for at least five minutes.
As shown in the warm-up drift curve, the offset voltage
typically changes 4 μV due to increasing chip temperature
after power-up. In the 10-second measurement interval,
these temperature-induced effects can exceed tens-of-
nanovolts.
For similar reasons, the device has to be well-shielded
from air currents. Shielding minimizes thermocouple effects.
Sudden motion in the vicinity of the device can also
feedthrough to increase the observed noise.
The test time to measure 0.1 Hz to 10 Hz noise should not
exceed 10 seconds. As shown in the noise-tester frequency
response curve, the 0.1 Hz corner is defined by only one
zero. The test time of 10 seconds acts as an additional zero
to eliminate noise contributions from the frequency band
below 0.1 Hz.
A noise voltage density test is recommended when
measuring noise on a large number of units. A 10 Hz noise
voltage density measurement correlates well with a 0.1 Hz to
10 Hz p-p noise reading, since both results are determined
by the white noise and the location of the 1/f corner
frequency.
UNITY-GAIN BUFFER APPLICATIONS
When Rf ≤ 100 Ω and the input is driven with a fast, large
signal pulse (>1 V), the output waveform looks as shown in the
pulsed operation diagram (see Figure 37).
During the fast feedthrough-like portion of the output, the
input protection diodes effectively short the output to the input,
and a current, limited only by the output short-circuit protect-
ion, is drawn by the signal generator. With Rf ≥ 500 Ω, the
output is capable of handling the current requirements (IL ≤ 20 mA
at 10 V); the amplifier stays in its active mode and a smooth
transition occurs.
When Rf > 2 kΩ, a pole is created with Rf and the amplifier’s
input capacitance (8 pF) that creates additional phase shift and
reduces phase margin. A small capacitor (20 pF to 50 pF) in
parallel with Rf eliminates this problem.
+
–
OP27
Rf
2.8V/
μs
00317-
037
Figure 37. Pulsed Operation
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