參數(shù)資料
型號： op191
廠商： Analog Devices, Inc.
英文描述： Micropower Single-Supply Rail-to-Rail Input/Output Op Amps(微功耗單電源滿幅度運算放大器)
中文描述： 微功耗單電源軌到軌輸入/輸出運算放大器（微功耗單電源滿幅度運算放大器）
文件頁數(shù)： 5/20頁
文件大小： 487K
代理商： OP191
OP191/OP291/OP491
REV. 0
–5–
ABSOLUT E MAX IMUM RAT INGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +16 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . .GND to V
S
+ 10 V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . .7 V
Output Short-Circuit Duration to GND . . . . . . . . . . Indefinite
Storage T emperature Range
P, S, RU Packages . . . . . . . . . . . . . . . . . . . –65
°
C to +150
°
C
Operating T emperature Range
OP191/OP291/OP491G . . . . . . . . . . . . . . .–40
°
C to +125
°
C
Junction T emperature Range
P, S, RU Packages . . . . . . . . . . . . . . . . . . . –65
°
C to +150
°
C
Lead T emperature Range (Soldering 60 sec) . . . . . . . . +300
°
C
Package T ype
θ
JA2
θ
JC
Units
8-Pin Plastic DIP (P)
8-Pin SOIC (S)
14-Pin Plastic DIP (P)
14-Pin SOIC (S)
14-Pin T SSOP (RU)
103
158
76
120
180
43
43
33
36
35
°
C/W
°
C/W
°
C/W
°
C/W
°
C/W
NOT ES
1
Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
2
θ
is specified for the worst case conditions; i.e.,
θ
is specified for device in socket
for P-DIP packages;
θ
JA
is specified for device soldered in circuit board for T SSOP
and SOIC packages.
WAFER TEST LIMTS
Parameter
Symbol
Conditions
Limit
Units
Offset Voltage
Input Bias Current
Input Offset Current
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
Output Voltage High
Output Voltage Low
Supply Current/Amplifier
V
OS
I
B
I
OS
V
CM
CMRR
PSRR
A
VO
V
OH
V
OL
I
SY
±
300
50
8
V– to V+
70
80
50
2.8
75
350
μ
V max
nA max
nA
V min
dB min
dB min
V/mV min
V min
mV max
μ
A max
V
CM
= 0 V to +2.9 V
V = 2.7 V to +12 V
R
L
= 10 k
R
L
= 2 k
to GND
R
L
= 2 k
to V+
V
O
= 0 V, R
L
=
∞
NOT E
Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard
product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
(@ V
S
= +3.0 V, V
CM
= 0.1 V, T
A
= +25
°
C unless otherwse noted)
ORDE RING GUIDE
T emperature
Range
Package
Description
Package
Option
Model
OP191GP
OP191GS
OP191GBC
OP291GP
OP291GS
OP291GBC
OP491GP
OP491GS
OP491HRU
OP491GBC
–40
°
C to +125
°
C
–40
°
C to +125
°
C
+25
°
C
–40
°
C to +125
°
C
–40
°
C to +125
°
C
+25
°
C
–40
°
C to +125
°
C
–40
°
C to +125
°
C
–40
°
C to +125
°
C
+25
°
C
8-Pin Plastic DIP
8-Pin SOIC
DICE
8-Pin Plastic DIP
8-Pin SOIC
DICE
14-Pin Plastic DIP N-14
14-Pin SOIC
14-Pin T SSOP
DICE
N-8
SO-8
N-8
SO-8
SO-14
RU-14
2
3
4
6
7
OP191 Die Size 0.047
×
0.066 Inch,
3,102 Sq. Mils. Substrate (Die Back-
side) Is Connected to V+.
Transistor Count, 74.
2
1
8
7
6
5
4
3
OP291 Die Size 0.070
×
0.070 Inch,
4,900 Sq. Mils. Substrate (Die Back-
side) Is Connected to V+.
Transistor Count, 146
DICE CHARACT E RIST ICS
2
1
14
13
12
11
10
9
8
7
6
5
4
3
OP491 Die Size 0.070
×
0.110 Inch,
7,700 Sq. Mils. Substrate (Die Back-
side) Is Connected to V+.
Transistor Count, 290.
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