參數(shù)資料
型號(hào): NTE980
廠商: NTE Electronics, Inc.
英文描述: Integrated Circuit CMOS, Micropower Phase-Locked Loop (PLL)
中文描述: 集成電路,微相的CMOS鎖相環(huán)路(PLL)
文件頁數(shù): 1/5頁
文件大?。?/td> 42K
代理商: NTE980
NTE980
Integrated Circuit
CMOS, Micropower Phase–Locked Loop (PLL)
Description:
The NTE980 CMOS Micropower Phase–Locked Loop (PLL) consists of a low–power, linear voltage–
controlled oscillator (VCO) and two different phase comparators having a common signal–input am-
plifier and a common comparator input in a 16–Lead type package. A 5.2V zener diode is provided
for supply regulation if necessary.
Features:
Very Low Power Consumption: 70
μ
W (Typ) @ VCO f
o
= 10kHz, V
DD
= 5V
Operating Frequency Range up to 1.4MHz (Typ) @ V
DD
= 10V, RI = 5k
Low Frequency Drift: 0.04%/
°
C (Typ) @ V
DD
= 10V
Choice of Two Phase Comparators:
Exclusive–OR Network (I)
Edge–Controlled Memory Network
w
/Phase–Pulse Output for Lock Indication (II)
High VCO Linearity: < 1% (Typ) @ V
DD
= 10V
VCO Inhibit Control for ON–OFF Keying and Ultra–Low Standby Power Consumption
Source–Follower Output of VCO Control Input (Demod. Output)
Zener Diode to Assist Supply Regulation
Standardized, Symmetrical Output Characteristics
100% Tested for Quiescent Current at 20V
5V, 10V, and 15V Parametric Ratings
Applications:
FM Demodulator and Modulator
Frequency Synthesis and Multiplication
Frequency Discriminator
Signal Conditioning
FSK – Modems
Data Synchronization
Voltage–to–Frequency Conversion
Tone Decoding
Absolute Maximum Ratings:
DC Supply Voltage Range (Voltages referenced to V
SS
terminal), V
DD
Input Voltage Range, All Inputs
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC Input Current, Any One Input
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Dissipation (T
A
= –40
°
to +60
°
C), P
D
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
T
A
= +60
°
to +85
°
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Device Dissipation Per Output Transistor (T
A
= –40
°
to +85
°
C)
Operating Temperature Range, T
A
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature Range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead Temperature (During Soldering, 1/16”
±
1/32” from case, 10sec Max), T
L
–0.5 to +20V
–0.5 to V
DD
+0.5V
. . . . . . . . . . . .
±
10mA
500mW
Derate Linearly at 12mW/
°
C to 200mW
. . . . . . . . . . . . . . . . . . . . . . .
100mW
–40
°
to +85
°
C
–65
°
to +150
°
C
. . . . . . . . . . .
+265
°
C
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