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參數(shù)資料
| 型號： | NTE937M |
| 廠商： | NTE Electronics, Inc. |
| 英文描述： | Integrated Circuit JFET Input Operational Amplifier |
| 中文描述： | 集成電路JFET輸入運(yùn)算放大器 |
| 文件頁數(shù)： | 1/3頁 |
| 文件大?。?/td> | 32K |
| 代理商： | NTE937M |
NTE937M
Integrated Circuit
JFET Input Operational Amplifier
Description:
The NTE937M is a monolithic JFET input operational amplifier in an 8–Lead DIP type package incor-
porating well–matched, high voltage JFET’s on the same chip with standard bi–polar transistors. This
amplifier features low input bias and offset currents, low offset voltage and offset voltage drift, coupled
with offset adjust which does not degrade drift or common–mode rejection. It is also designed for high
slew rate, wide bandwidth, extremely fast settling time, low voltage and current noise and a low 1/f
noise corner.
Advantages:
Replaces Expensive Hybrid and Module FET OP Amps
Rugged JFET’s Allow Blow–Out Free Handling Compared with MOSFET Input Device
Excellent for Low Noise Applications using either High or Low Source Impedance – Very Low
1/f Corner
Offset Adjust does not Degrade Drift or Common–Mode Rejection as in Most Monolithic Amplifiers
New Output Stage Allows use of Large Capacitive Loads (10,000pF) without Stability Problems
Internal Compensation and Large Differential Input Voltage Capability
Applications:
Precision High Speed Integrators
Fast D/A and A/D Converters
High Impedance Buffers
Wideband, Low Noise, Low Drift Amplifiers
Logarithmic Amplifiers
Photocell Amplifiers
Sample and Hold Circuits
Absolute Maximum Ratings:
Supply Voltage
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Power Dissipation (at +25
°
C, Note 1), P
d
Differential Input Voltage
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Voltage Range (Note 2)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Short–Circuit Duration
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Operating Junction Temperature (Note 1), T
J
max
Storage Temperature Range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead Temperature (During Soldering, 10sec), T
L
Thermal Resistance, Junction–to–Ambient (Note 1), R
thJC
Note 1. The maximum power dissipation for this device must be derated at elevated temperatures
and is dictated by T
J
max, R
thJC
, and the ambient temperature, T
A
. The maximum available
power dissipation at any temperature is P
d
= (T
J
max – T
A
)/R
thJC
or the +25
°
C P
d
max, which-
ever is less.
Note 2. Unless otherwise specified, the absolute maximum negative input voltage is equal to the
negative power supply voltage.
±
18V
500mW
±
30V
±
16V
Continuous
+100
°
C
–65
°
to +150
°
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . .
+300
°
C
+155
°
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . .
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