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參數(shù)資料
| 型號： | NTE1739 |
| 廠商： | NTE Electronics, Inc. |
| 英文描述： | Integrated Circuit TV Horizontal/Vertical Countdown Digital Sync System |
| 中文描述： | 集成電路電視水平/垂直倒計時數(shù)字同步系統(tǒng) |
| 文件頁數(shù)： | 2/3頁 |
| 文件大?。?/td> | 22K |
| 代理商： | NTE1739 |
Circuit Operation (Cont’d)
The Gain/Window switch input on Pin10 is a logic input which controls the digital window in which the
system looks for the occurrence of a vertical sync pulse: it also adjusts the phase detector gain for
the two corresponding vertical windows. The 464th (Pin10 = low) or the 512th (Pin10 = high) clock
pulse (at 2fH) from the horizontal divider is used to set the start of the vertical sync window. The end
of the sync window occurs at the 592nd (Pin10 = low) or the 568th (Pin10 = High) clock pulse. If the
incoming vertical sync pulse occurs regularly at the same time the 525th clock pulse occurs, it is used
to generate the start of the vertical blanking and vertical sweep; the system is in the standard sync
mode. If the incoming vertical sync pulse pulse is absent (removed by noise, for example), the
10
–
stage counter will continue to provide an output pulse at the 525th clock pulse; a 3
–
bit counter
will count the number of fields where no sync pulse occurred coincident with the 525th clock pulse.
If no coincidence is detected in 8 sequential fields, the 3
–
bit counter energizes the toggle which shifts
the mode of operation from standard sync to nonstandard sync.
In the nonstandard sync mode vertical scan is initiated by the incoming vertical sync pulse. Non stan-
dard sync operation results when the incoming vertical sync pulse occurs regularly within the vertical
sync window; 464 to 592 counts (Pin10 = low) or 512 to 568 counts (Pin10 = high) but not at the 525th
count (Standard Sync Mode). In the nonstandard sync mode if no sync pulse is present, the system
will free run at a frequency determined by the 592 (Pin10 = low) or 568 (Pin10 = high) count.
The NTE1739 generates a composite blanking signal and a burst
–
gate (key pulse) which, when
summed externally, produce the sandcastle pulse necessary for the operation of most Chrom/Lumi-
nance integrated circuits.
Electrical Characteristics:
(T
A
°
to +70
°
C unless otherwise specified)
Parameter
Pin
Test Conditions
Min
Typ
Max
Unit
Supply Current
7
Adjust 24V Supply for 7V on Pin7
7
–
14
mA
Regulator Voltage
7
7.0
–
8.6
V
Saturation Voltages
Horizontal Output
8
0
–
0.4
V
Inverted Horizontal Output
13
0
–
0.4
V
Vertical Output
11
0
–
0.2
V
Blanking Output
12
0
–
0.175
V
Horizontal Ramp Output
15
0
–
0.175
V
Horizontal VCO Free Running Freq.
8
No Sync Applied S
1
= B
For 15734
±
1Hz
Std NTSC Sync Applied
15547
–
15854
Hz
Horizontal VCO Oscillator Pull
–
In
8
–
300
–
+300
Hz
μ
s
μ
s
μ
s
ns
Horizontal Blanking Width
12
9.5
–
10.5
Vertical Blanking Width
12
Std NTSC Sync Applied
1140
–
1148
Burst Gate Width
16
Std NTSC Sync Applied
2.98
–
3.42
Burst Gate Delay
16
From End of Horizontal Sync (Pin3)
to Start of Burst Gate (Pin16)
20
–
215
Horizontal Pulse Width
8
Std NTSC Sync Applied
31.4
–
32.1
μ
s
μ
s
Vertical Pulse Width
11
Std NTSC Sync Applied
504
–
516
Horizontal Sync Input
–
–
10
–
V
P
–
P
V
P
–
P
Vertical Sync Input
–
–
10
–
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