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參數(shù)資料
| 型號： | NTE1475 |
| 廠商： | NTE Electronics, Inc. |
| 英文描述： | Integrated Circuit CMOS, Phase-Locked Loop (PLL) Frequency Synthesizer for CB |
| 中文描述： | 集成的CMOS電路，鎖相環(huán)路（PLL）頻率合成文件 |
| 文件頁數(shù)： | 1/3頁 |
| 文件大?。?/td> | 29K |
| 代理商： | NTE1475 |
NTE1475
Integrated Circuit
CMOS, Phase–Locked Loop (PLL) Frequency
Synthesizer for CB
Features:
Built–in high speed programmable divider for direct PLL system
PLL out–of–lock output available to inhibit transmittion.
Instantaneous call capability of channel 9 and 19.
Built–in detecting circuit of mis–program
Built–in amplifier for crystal oscillator
Built–in amplifier for active low–pass filter.
BCD code channel selection. (Pull–down resistors included)
Absolute Maximum Ratings:
(T
A
= +25
°
C unless otherwie specified)
Maximum Supply Voltage, V
DD
max
Maximum Input Voltage, V
IN
max
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Output Voltage (MC, LM, A
OUT
, Output Off), V
OUT(1)
Maximum Output Voltage (PD
OUT
, Output Off), V
OUT(2)
Maximum Output Current (MC, LM), I
OUT (1)
Maximum Output Current (A
OUT
), I
OUT (2)
Allowable Power Dissipation, P
D
max (T
A
= +70
°
C)
Operating Temperature Range, T
opg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature Range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–0.3 to +8.0V
–0.3 to V
DD
+0.3V
–0.3 to +10.0V
–0.3 to V
DD
+ 0.3V
0 to 15mA
0 to 2.5mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
300mW
–30
°
to +70
°
C
–40
°
to +125
°
C
Allowable Operating Ranges:
(T
A
= +25
°
C unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Supply Voltage
V
DD
T
A
= –30
°
to +70
°
C
5.0
6.0
7.0
V
Output Voltage
V
OUT
MC, LM, A
OUT
, Output Off
0
–
9.0
V
Input Amplitude
V
IN (1)
X
IN
, f
IN (1)
= 10.25MH
Z
, Note 1
1.0
–
0.9V
DD
V
p–p
V
IN (2)
P
IN
, f
IN (2)
= 20MH
Z
, Note 1
1.0
–
0.9V
DD
V
p–p
Input Frequency
f
IN (1)
X
IN
, V
IN (1)
= 1.0V
p–p
, Note 1
1.0
–
10.25
MH
Z
f
IN (2)
P
IN
, V
IN (2)
= 1.0V
p–p
, Note 1
1.0
–
20
MH
Z
Input “H” Level Voltage
V
IH
D1 to D6, T/R, CH9, CH19
V
DD
–0.8
–
–
V
Input “L” Level Voltage
V
IL
D1 to D6, T/R, CH9, CH19
–
–
0.8
V
Note 1. Sinusoidal wave, capacitive coupling, T
A
= –30
°
to +70
°
C
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