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參數(shù)資料
| 型號(hào)： | NTE1167 |
| 廠商： | NTE Electronics, Inc. |
| 英文描述： | Integrated Circuit Phase Lock Loop(PLL) Frequency Synthesizer |
| 中文描述： | 集成電路鎖相環(huán)（PLL）頻率合成器 |
| 文件頁數(shù)： | 1/2頁 |
| 文件大?。?/td> | 23K |
| 代理商： | NTE1167 |
NTE1167
Integrated Circuit
Phase Lock Loop (PLL) Frequency Synthesizer
Description:
The NTE1167 consists of a crystal oscillator, 10 bit divider, phase comparator, and a programmable
divide–by–N 9–bit counter in a single CMOS 16–Lead DIP type integrated circuit.
This device is designed for use in frequency synthesizers and phase locked loop applications for CB
transceivers since it includes a reference frequency selector pin.
Absolute Maximum Ratings:
(T
A
= +25
°
C unless otherwise specified)
Supply Voltage, V
DD
– V
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Voltage, V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Dissipation, P
D
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Temperature Range, T
opr
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature Range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead Temperature (During Soldering, 5sec Max), T
L
–0.3V to +7V
V
SS
≤
V
IN
≤
V
DD
250mW
–30
°
to +70
°
C
–55
°
to +125
°
C
+260
°
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics:
(V
DD
– V
SS
= 6V, –30
°
≤
T
A
≤
+70
°
C, f
in
Q
in
= 10.24MHz unless otherwise
specified)
Parameter
Symbol
Input Voltage (All Inputs)
Low Level
V
IL
Note 1
High Level
V
IH
Pull–Up Resistance
R
UP
F
S
Pull–Down Resistance
R
DN
P
0
– P
8
Supply Current
I
DD
V
DD
= 5.5V, V
in
F
in
= 1V
P–P
,
Exclude sink current of preset pin
Output Voltage
High Level
V
OH
LD
I
OH
= 0.1mA
Low Level
V
OL
LD
I
OL
= 0.1mA
Output Current
High Level
I
SAT
H D
O
V
O
= 0V
Low Level
I
SAT
L D
O
V
O
= 0V
Output Voltage
V
IF
F
in
V
DD
= 5V
V
IF
F
S
V
IF
P
0
– P
8
Max Input Frequency
f
IN
Max Q
in
f
IN
Max F
in
Max Free Running Frequency
f
FR
Max F
IN
Operating Voltage
V
DD
Note 1. All inputs refers to pins P
0
to P
8
, F
S
, F
in
, and Q
in
. This parameter defins their input levels
at DC coupling.
Test Conditions
Min
Typ Max Unit
–
–
–
0.5
–
0
–
9.0
V
V
5.5
–
15
–
2.0
75
5.0
M
k
mA
5.5
0
–
–
–
V
V
0.5
400
400
1.7
5.5
–
11
3.3
3.5
5.0
–
–
–
–
μ
A
μ
A
V
V
V
MHz
MHz
MHz
V
2.2
–
–
–
–
–
–
2.8
–
0.5
–
–
–
6.5
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