參數(shù)資料
型號(hào): NT5SV32M8AT-8B
廠商: Electronic Theatre Controls, Inc.
英文描述: 256Mb Synchronous DRAM
中文描述: 256Mb的同步DRAM
文件頁(yè)數(shù): 23/65頁(yè)
文件大?。?/td> 814K
代理商: NT5SV32M8AT-8B
NT5SV64M4AT(L)
NT5SV32M8AT(L)
NT5SV16M16AT(L)
256Mb Synchronous DRAM
REV 1.0
May, 2001
23
NANYA TECHNOLOGY CORP
. All rights reserved.
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
Precharge Termination
The Precharge Command may be used to terminate either a burst read or burst write operation. When the Precharge command
is issued, the burst operation is terminated and bank precharge begins. For burst read operations, valid data will continue to
appear on the data bus as a function of CAS Latency.
Burst Read Interrupted by Precharge
COMMAND
READ Ax
0
NOP
NOP
NOP
NOP
NOP
*
NOP
NOP
t
CK2
,
DQs
CAS latency = 2
CK
T0
T2
T1
T3
T4
T5
T6
T7
T8
DOUT Ax
0
DOUT Ax
1
DOUT Ax
2
DOUT Ax
3
Precharge A
t
CK3
,
DQs
CAS latency = 3
DOUT Ax
0
DOUT Ax
1
DOUT Ax
2
DOUT Ax
3
t
RP
t
RP
*
Bank A can be reactivated at completion of t
.
t
RP
is a function of clock cycle time and speed sort.
*
See the Clock Frequency and Latency table.
(Burst Length = 8, CAS Latency = 2, 3)
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