參數(shù)資料
型號: NMC27C64Q200
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: PROM
英文描述: IC-64K CMOS EPROM
中文描述: 8K X 8 UVPROM, 200 ns, CDIP28
封裝: WINDOWED, CERDIP-28
文件頁數(shù): 1/10頁
文件大?。?/td> 82K
代理商: NMC27C64Q200
1
www.fairchildsemi.com
NMC27C64 Rev. C
N
NMC27C64
65,536-Bit (8192 x 8) CMOS EPROM
General Description
The NMC27C64 is a 64K UV erasable, electrically reprogrammable
and one-time programmable (OTP) CMOS EPROM ideally suited
for applications where fast turnaround, pattern experimentation
and low power consumption are important requirements.
The NMC27C64 is designed to operate with a single +5V power
supply with
±
10% tolerance. The CMOS design allows the part to
operate over extended and military temperature ranges.
The NMC27C64Q is packaged in a 28-pin dual-in-line package
with a quartz window. The quartz window allows the user to
expose the chip to ultraviolet light to erase the bit pattern. A new
pattern can then be written electrically into the device by following
the programming procedure.
The NMC27C64N is packaged in a 28-pin dual-in-line plastic
molded package without a transparent lid. This part is ideally
Block Diagram
January 1999
suited for high volume production applications where cost is an
important factor and programming only needs to be done once.
This family of EPROMs are fabricated with Fairchild’s proprietary,
time proven CMOS double-poly silicon gate technology which
combines high performance and high density with low power
consumption and excellent reliability.
Features
I
High performance CMOS
—150 ns access time
I
JEDEC standard pin configuration
—28-pin Plastic DIP package
—28-pin CERDIP package
I
Drop-in replacement for 27C64 or 2764
I
Manufacturers identification code
DS008634-1
Output Enable,
Chip Enable, and
Program Logic
Y Decoder
X Decoder
.
.
Output
Buffers
65,536-Bit
Cell Matrix
Data Outputs O0 - O7
VCC
GND
VPP
OE
PGM
CE
A0 - A12
Address
Inputs
1998 Fairchild Semiconductor Corporation
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相關(guān)代理商/技術(shù)參數(shù)
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