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參數(shù)資料
| 型號： | NMC27C64N |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | 65,536-BIT (8192 X 8) CMOS EPROM |
| 中文描述： | 65,536位（8192 × 8）的CMOS存儲器 |
| 文件頁數(shù)： | 9/10頁 |
| 文件大?。?/td> | 175K |
| 代理商： | NMC27C64N |
9
www.fairchildsemi.com
NMC27C64 Rev. C
N
Functional Description
(Continued)
Program Inhibit
Programming multiple NMC27C64s in parallel with different data
is also easily accomplished. Except for CE all like inputs (including
OE and PGM) of the parallel NMC27C64 may be common. A TTL
low level program pulse applied to an NMC27C64
’
s PGM input
with CE at V
and V
at 13.0V will program that NMC27C64. A
TTL high level CE input inhibits the other NMC27C64s from being
programmed.
Program Verify
A verify should be performed on the programmed bits to determine
whether they were correctly programmed. The verify may be
performed with V
at 13.0V. V
must be at V
CC
, except during
programming and program verify.
MANUFACTURER
’
S IDENTIFICATION CODE
The NMC27C64 has a manufacturer
’
s identification code to aid in
programming. The code, shown in Table 2, is two bytes wide and
is stored in a ROM configuration on the chip. It identifies the
manufacturer and the device type. The code for the NMC27C64
is
“
8FC2
”
, where
“
8F
”
designates that it is made by Fairchild
Semiconductor, and
“
C2
”
designates a 64k part.
The code is accessed by applying 12V 0.5V to address pin A9.
Addresses A1
–
A8, A10
–
A12, CE, and OE are held at V
IL
. Address
A0 is held at V
for the manufacturer
’
s code, and at V
for the
device code. The code is read out on the 8 data pins. Proper code
access is only guaranteed at 25 C 5 C.
The primary purpose of the manufacturer
’
s identification code is
automatic programming control. When the device is inserted in a
EPROM programmer socket, the programmer reads the code and
then automatically calls up the specific programming algorithm for
the part. This automatic programming control is only possible with
programmers which have the capability of reading the code.
ERASURE CHARACTERISTICS
The erasure characteristics of the NMC27C64 are such that
erasure begins to occur when exposed to light with wavelengths
shorter than approximately 4000 Angstroms (
). It should be
noted that sunlight and certain types of fluorescent lamps have
wavelengths in the 3000
–
4000
range.
After programming, opaque labels should be placed over the
NMC27C64
’
s window to prevent unintentional erasure. Covering
the window will also prevent temporary functional failure due to the
generation of photo currents.
The recommended erasure procedure for the NMC27C64 is
exposure to short wave ultraviolet light which has a wavelength of
2537 Angstroms (
). The integrated dose (i.e., UV intensity x
exposure time) for erasure should be a minimum of 15W-sec/cm
2
.
The NMC27C64 should be placed within 1 inch of the lamp tubes
during erasure. Some lamps have a filter on their tubes which
should be removed before erasure.
An erasure system should be calibrated periodically. The distance
from lamp to unit should be maintained at one inch. The erasure
time increases as the square of the distance. (If distance is
doubled the erasure time increases by a factor of 4.) Lamps lose
intensity as they age. When a lamp is changed, the distance has
changed or the lamp has aged, the system should be checked to
make certain full erasure is occurring. Incomplete erasure will
cause symptoms that can be misleading. Programmers, compo-
nents, and even system designs have been erroneously sus-
pected when incomplete erasure was the problem.
SYSTEM CONSIDERATION
The power switching characteristics of EPROMs require careful
decoupling of the devices. The supply current, I
CC
, has three
segments that are of interest to the system designer
—
the standby
current level, the active current level, and the transient current
peaks that are produced by voltage transitions on input pins. The
magnitude of these transient current peaks is dependent on the
output capacitance loading of the device. The associated V
transient voltage peaks can be suppressed by properly selected
decoupling capacitors. It is recommended that at least a 0.1 F
ceramic capacitor be used on every device between V
and
GND. This should be a high frequency capacitor of low inherent
inductance. In addition, at least a 4.7 F bulk electrolytic capacitor
should be used between V
and GND for each eight devices. The
bulk capacitor should be located near where the power supply is
connected to the array. The purpose of the bulk capacitor is to
overcome the voltage drop caused by the inductive effects of the
PC board traces.
TABLE 2. Manufacturer
’
s Identification Code
Pins
A0
(10)
O7
(19)
O6
(18)
O5
(17)
O4
(16)
O3
(15)
O2
(13)
O1
(12)
O0
(11)
Hex
Data
Manufacturer Code
V
IL
1
0
0
0
1
1
1
1
8F
Device Code
V
IH
1
1
0
0
0
0
1
0
C2
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| NMC27C64N150 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:IC-64K CMOS OTP PROM |
| NMC27C64N200 | 制造商:Texas Instruments 功能描述: |
| NMC27C64N250 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EPROM |
| NMC27C64Q | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:65,536-BIT (8192 X 8) CMOS EPROM |
| NMC27C64Q150 | 制造商:Texas Instruments 功能描述: |
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