參數(shù)資料
型號: NM93C66ALZEN
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: PROM
英文描述: Microwire Serial EEPROM
中文描述: 256 X 16 MICROWIRE BUS SERIAL EEPROM, PDIP8
封裝: PLASTIC, DIP-8
文件頁數(shù): 4/13頁
文件大?。?/td> 111K
代理商: NM93C66ALZEN
4
www.fairchildsemi.com
NM93C66A Rev. E.1
N
(
T
Absolute Maximum Ratings
(Note 1)
Ambient Storage Temperature
All Input or Output Voltages
with Respect to Ground
Lead Temperature
(Soldering, 10 sec.)
ESD rating
DC and AC Electrical Characteristics
V
CC
= 2.7V to 5.5V unless otherwise specified
-65
°
C to +150
°
C
+6.5V to -0.3V
+300
°
C
2000V
Operating Conditions
Ambient Operating Temperature
NM93C66AL/LZ
NM93C66ALE/LZE
NM93C66ALV/LZV
0
°
C to +70
°
C
-40
°
C to +85
°
C
-40
°
C to +125
°
C
Power Supply (V
CC
)
2.7V to 5.5V
Symbol
Parameter
Conditions
Min
Max
Units
I
CCA
I
CCS
Operating Current
CS = V
IH
, SK=1.0 MHz
CS = V
IL
1
mA
Standby Current
L
LZ (2.7V to 4.5V)
Input Leakage
Output Leakage
Input Leakage ORG Pin
10
1
±
1
μ
A
μ
A
μ
A
I
IL
I
OL
I
ILO
V
IN
= 0V to V
CC
(Note 2)
ORG tied to V
CC
ORG tied to V
SS
(Note 3)
-1
-2.5
1
μ
A
2.5
V
IL
V
IH
V
OL
V
OH
f
SK
t
SKH
t
SKL
t
SKS
t
CS
t
CSS
t
DH
t
DIS
t
CSH
t
DIH
t
PD
t
SV
t
DF
t
WP
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
SK Clock Frequency
SK High Time
SK Low Time
SK Setup Time
-0.1
0.8V
CC
0.15V
CC
V
CC
+1
0.1V
CC
V
I
OL
= 10
μ
A
I
OH
= -10
μ
A
(Note 4)
V
0.9V
CC
0
1
1
0.2
250
KHz
μ
s
μ
s
μ
s
μ
s
μ
s
ns
μ
s
ns
μ
s
μ
s
μ
s
μ
s
ms
Minimum CS Low Time
(Note 5)
1
CS Setup Time
DO Hold Time
DI Setup Time
0.2
70
0.4
CS Hold Time
DI Hold Time
Output Delay
0
0.4
2
CS to Status Valid
1
CS to DO in Hi-Z
Write Cycle Time
CS = V
IL
0.4
15
Capacitance
T
A
= 25
°
C, f = 1 MHz (Note 6)
Symbol
Test
Typ
Max
Units
C
OUT
C
IN
Output Capacitance
Input Capacitance
5
5
pF
pF
Note 1
:
to the device. This is a stress rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of the specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect device reliability.
Stress above those listed under
Absolute Maximum Ratings
may cause permanent damage
Note 2
:
Typical leakage values are in the 20nA range.
ORG pin may draw >1
μ
A when in x8 mode due to the internal pull-up transistor.
The shortest allowable SK clock period = 1/f
(as shown under the f
parameter). Maximum
SK clock speed (minimum SK period) is determined by the interaction of several AC parameters stated
in the datasheet. Within this SK period, both t
SKH
and t
limits must be observed. Therefore, it is not
allowable to set 1/f
SK
= t
SKHminimum
+ t
SKLminimum
for shorter SK cycle time operation.
Note 5
:
CS (Chip Select) must be brought low (to V
) for an interval of t
in order to reset all internal
device registers (device reset) prior to beginning another opcode cycle. (This is shown in the opcode
diagram on the following page.)
Note 3
:
Note 4
:
Note 6
:
This parameter is periodically sampled and not 100% tested.
AC Test Conditions
V
CC
Range
V
/V
Input Levels
0.3V/1.8V
V
/V
V
/V
Timing Level
0.8V/1.5V
I
OL
/I
OH
Timing Level
1.0V
2.7V
V
5.5V
(Extended Voltage Levels)
4.5V
V
5.5V
(TTL Levels)
±
10
μ
A
0.4V/2.4V
1.0V/2.0V
0.4V/2.4V
2.1mA/-0.4mA
Output Load: 1 TTL Gate (C
L
= 100 pF)
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