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參數(shù)資料
| 型號： | NM34W02M8X |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | PROM |
| 英文描述： | 2K-Bit Standard 2-Wire Bus Interface Serial EEPROM with Full Array Write Protect |
| 中文描述： | 256 X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8 |
| 封裝： | 0.150 INCH, PLASTIC, SOP-8 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 108K |
| 代理商： | NM34W02M8X |
7
www.fairchildsemi.com
NM34W02 Rev. C.2
N
w
Device Addressing
Following a start condition the master must output the address of
the slave it is accessing. The most significant four bits of the slave
address are those of the device type identifier (see Figure 4) This
is fixed as 1010 for all EEPROM devices.
Write Cycle Timing
SDA
SCL
STOP
CONDITION
START
CONDITION
WORD n
8th BIT
ACK
tWR
DS500078-7
SDA
SCL
START
CONDITION
STOP
CONDITION
SDA
SCL
DATA STABLE
DATA
CHANGE
SCL FROM
MASTER
DATA OUTPUT
FROM
TRANSMITTER
DATA OUTPUT
FROM
RECEIVER
1
8
9
START
ACKNOWLEDGE
DS500078-8
DS500078-9
Data Validity (Figure 1).
Start and Stop Definition (Figure 2).
All IIC EEPROMs use an internal protocol that defines a PAGE
BLOCK size of 2K bits (for Byte addresses 00 through FF).
Acknowledge Responses from Receiver (Figure 3).
DS500078-10
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