參數(shù)資料
型號: NM27P512QE150
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: PROM
英文描述: 524,288-Bit (64K x 8) Processor Oriented CMOS EPROM
中文描述: 64K X 8 UVPROM, 150 ns, CDIP28
封裝: WINDOWED, CERAMIC, DIP-28
文件頁數(shù): 5/12頁
文件大小: 176K
代理商: NM27P512QE150
Programming Characteristics
(Notes 1 and 2)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
AS
Address Setup Time
1
m
s
t
OES
OE Setup Time
1
m
s
t
DS
Data Setup Time
1
m
s
t
VCS
V
CC
Setup Time
1
m
s
t
AH
Address Hold Time
0
m
s
t
DH
Data Hold Time
1
m
s
t
CF
Chip Enable to Output Float Delay
OE
e
V
IL
0
60
ns
t
PW
Program Pulse Width
95
100
105
m
s
t
OEH
OE Hold Time
1
m
s
t
DV
Data Valid from CE
OE
e
V
IL
250
ns
t
PRT
OE Pulse Rise Time
during Programming
50
ns
t
VR
V
PP
Recovery Time
1
m
s
I
PP
V
PP
Supply Current during
Programming Pulse
CE
e
V
IL
OE
e
V
PP
30
mA
I
CC
V
CC
Supply Current
50
mA
§
C
T
R
Temperature Ambient
20
25
30
V
CC
Power Supply Voltage
6
6.25
6.5
V
V
PP
Programming Supply Voltage
12.5
12.75
13
V
t
FR
Input Rise, Fall Time
5
ns
V
IL
Input Low Voltage
0
0.45
V
V
IH
Input High Voltage
2.4
4
V
t
IN
Input Timing Reference Voltage
0.8
2
V
t
OUT
Output Timing Reference Voltage
0.8
2
V
Programming Waveforms
TL/D/11365–5
Note 1:
National’s standard product warranty applies to devices programmed to specifications described herein.
Note 2:
V
CC
must be applied simultaneously or before V
PP
and removed simultaneously or after V
PP
. The EPROM must not be inserted into or removed from a
board with voltage applied to V
PP
or V
CC
.
Note 3:
The maximum absolute allowable voltage which may be applied to the V
PP
pin during programming is 14V. Care must be taken when switching the V
PP
supply to prevent any overshoot from exceeding this 14V maximum specification. At least a 0.1
m
F capacitor is required across V
CC
to GND to suppress spurious
voltage transients which may damage the device.
Note 4:
Programming and program verify are tested with the fast Program Algorithm at typical power supply voltages and timings.
5
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