參數(shù)資料
型號(hào): NM27C240
廠商: Fairchild Semiconductor Corporation
英文描述: 4,194,304-Bit (256k x 16) High Performance CMOS EPROM
中文描述: 4,194,304位(256k × 16)高性能的CMOS存儲(chǔ)器
文件頁(yè)數(shù): 1/10頁(yè)
文件大?。?/td> 96K
代理商: NM27C240
1
www.fairchildsemi.com
N
NM27C240
4,194,304-Bit (256k x 16) High Performance
CMOS EPROM
General Description
The NM27C240 is a high performance Electrically Programmable
UV erasable ROM (EPROM). It contains 4,194,304 bits config-
ured as 256k x 16 bits. It is offered in both erasable versions for
prototyping and early production applications as well as non-
erasable, plastic packaged versions that are ideal for high volume
and automated assembly applications.
The NM27C240 operates from a single 5V
±
10% supply in the
read mode.
The NM27C240 is offered in both DIP and surface mount pack-
ages. The DIP package is a 40-pin dual-in-line ceramic with a
quartz window to allow erasing. The surface mount package is a
44-pin PLCC that is offered in OTP.
This EPROM is manufactured using Fairchild’s proprietary AMG
EPROM technology for an excellent combination of speed and
economy while providing excellent reliability.
Block Diagram
July 1998
Features
I
High performance CMOS
—100 ns access time
I
Fast turn-off for microprocessor compatibility
I
Simplified upgrade path
—V
and PGM are “Don’t Care” during normal read
operation
I
Compatible with 27240 and 27C240 EPROMs
I
JEDEC standard pin configuration
—40-pin DIP package
—44-pin PLCC package
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Manufacturer’s identification code
I
Fast programming algorithm
AMG is a trademark of WSI, Inc.
1998 Fairchild Semiconductor Corporation
Vcc
GND
Vpp
OE
CE/PGM
Output Enable
Chip Enable, and
Program Logic
Y
Decoder
X
Decoder
Output
Buffers
4,194,304-Bit
Cell Matrix
A0 - A17
Address
Inputs
Data Outputs O0 - O15
DS011949-1
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