- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄363349 > NM24W17ULZVN (FAIRCHILD SEMICONDUCTOR CORP) 16K-Bit Serial EEPROM 2-Wire Bus Interface PDF資料下載
參數(shù)資料
| 型號(hào)： | NM24W17ULZVN |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類(lèi)： | PROM |
| 英文描述： | 16K-Bit Serial EEPROM 2-Wire Bus Interface |
| 中文描述： | 2K X 8 I2C/2-WIRE SERIAL EEPROM, PDIP8 |
| 封裝： | PLASTIC, DIP-8 |
| 文件頁(yè)數(shù)： | 9/13頁(yè) |
| 文件大小： | 109K |
| 代理商： | NM24W17ULZVN |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)當(dāng)前第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)
9
www.fairchildsemi.com
NM24C16U/17U Rev. B.1
N
Device Type
Identifier
1
0
1
0
A2
A1
A0
R/W
(LSB)
NM24C16U/17U
Page
Block Address
DS800010-14
Write Cycle Timing
(Continued)
The NM24C16U/17U device will always respond with an acknowl-
edge after recognition of a start condition and its slave address. If
both the device and a write operation have been selected, the
NM24C16U/17U will respond with an acknowledge after the
receipt of each subsequent eight bit byte.
In the read mode the NM24C16U/17U slave will transmit eight bits
of data, release the SDA line and monitor the line for an acknowl-
edge. If an acknowledge is detected and no stop condition is
generated by the master, the slave will continue to transmit data.
If an acknowledge is not detected, the slave will terminate further
data transmissions and await the stop condition to return to the
standby power mode.
Device Addressing
Following a start condition the master must output the address of
the slave it is accessing. The most significant four bits of the slave
address are those of the device type identifier (see Figure 5) This
is fixed as 1010 for all EEPROM devices.
Slave Addresses (Figure 5)
Refer to the following table for Slave Addresses string details:
Device
A0 A1 A2 Page
Page Block
Addresses
Blocks
NM24C16U/17U
P
P
P
8
000 001 010 011 ... 111
P: Refers to an internal PAGE BLOCK memory segment.
All IIC EEPROMs use an internal protocol that defines a PAGE
BLOCK size of 2K bits (for Word addressess 0000 through 1111).
Therefore, address bits A0, A1, or A2 (if designated 'P') are used
to access a PAGE BLOCK in conjunction with the Word address
used to access any individual data byte (Word).
The last bit of the slave address defines whether a write or read
condition is requested by the master. A '1' indicates that a read
operation is to be executed, and a '0' initiates the write mode.
A simple review: After the NM24C16U/17U recognizes the start
condition, the devices interfaced to the IIC bus wait for a slave
address to be transmitted over the SDA line. If the transmitted
slave address matches an address of one of the devices, the
designated slave pulls the line LOW with an acknowledge signal
and awaits further transmissions.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| NM24W17UM8 | 16K-Bit Serial EEPROM 2-Wire Bus Interface |
| NM24W17UMT8 | 16K-Bit Serial EEPROM 2-Wire Bus Interface |
| NM24W17UN | 16K-Bit Serial EEPROM 2-Wire Bus Interface |
| NM24W17UTEM8 | 16K-Bit Serial EEPROM 2-Wire Bus Interface |
| NM24W17UTEMT8 | 16K-Bit Serial EEPROM 2-Wire Bus Interface |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NM-250 | 制造商:WALDOM ELECTRONICS 功能描述: |
| NM-250-0015P | 制造商:WALDOM ELECTRONICS 功能描述: |
| NM-250-0025P | 制造商:WALDOM ELECTRONICS 功能描述: |
| NM25001S00 | 制造商:RadiSys 功能描述:LVDS;ADDCARD;BG845&LS855 |
| NM25C020 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:2K-Bit Serial CMOS EEPROM (Serial Peripheral Interface (SPI) Synchronous Bus) |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。