參數(shù)資料
型號: NM24C04U
廠商: Fairchild Semiconductor Corporation
英文描述: EEPROM 2-Wire Bus Interface
中文描述: EEPROM的2線總線接口
文件頁數(shù): 8/13頁
文件大?。?/td> 89K
代理商: NM24C04U
8
www.fairchildsemi.com
NM24C04U/NM24C05U Rev. C.1
N
DS800008-10
SDA
SCL
STOP
CONDITION
START
CONDITION
WORD n
8th BIT
ACK
tWR
Write Cycle Timing (Figure 1)
Note:
The write cycle time (t
WR
) is the time from a valid stop condition of a write sequence to the end of the internal erase/program cycle.
Data Validity (Figure 2)
Start and Stop Definition (Figure 3)
Acknowledge Response from Receiver (Figure 4)
SCL FROM
MASTER
DATA OUTPUT
FROM
TRANSMITTER
DATA OUTPUT
FROM
RECEIVER
1
8
9
START
ACKNOWLEDGE
SDA
SCL
START
CONDITION
STOP
CONDITION
SCL
DATA STABLE
DATA
CHANGE
SDA
DS800008-11
DS800008-12
DS800008-13
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參數(shù)描述
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