參數(shù)資料
型號(hào): NLU1GT126CMX1TCG
廠商: ON Semiconductor
文件頁(yè)數(shù): 1/10頁(yè)
文件大?。?/td> 0K
描述: IC BUFF TRI-ST TTL N-INV 6ULLGA
標(biāo)準(zhǔn)包裝: 3,000
邏輯類型: 緩沖器/線路驅(qū)動(dòng)器,非反相
元件數(shù): 1
每個(gè)元件的位元數(shù): 1
輸出電流高,低: 8mA,8mA
電源電壓: 1.65 V ~ 5.5 V
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 6-XFLGA
供應(yīng)商設(shè)備封裝: 6-ULLGA(1x1)
包裝: 帶卷 (TR)
Semiconductor Components Industries, LLC, 2012
July, 2012 Rev. 3
1
Publication Order Number:
NLU1GT126/D
NLU1GT126
Non-Inverting 3-State
Buffer, TTL Level
LSTTLCompatible Inputs
The NLU1GT126 MiniGate
t is an advanced CMOS highspeed
noninverting buffer in ultrasmall footprint.
The NLU1GT126 requires the 3state control input (OE) to be set
Low to place the output in the high impedance state.
The device input is compatible with TTLtype input thresholds and
the output has a full 5.0 V CMOS level output swing.
The NLU1GT126 input and output structures provide protection
when voltages up to 7.0 V are applied, regardless of the supply
voltage.
Features
High Speed: tPD = 3.8 ns (Typ) @ VCC = 5.0 V
Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C
TTLCompatible Input: VIL = 0.8 V; VIH = 2.0 V
CMOSCompatible Output:
VOH > 0.8 VCC; VOL < 0.1 VCC @ Load
Power Down Protection Provided on inputs
Balanced Propagation Delays
UltraSmall Packages
These are PbFree Devices
VCC
OE
IN A
OUT Y
GND
1
2
3
5
4
OE
OUT Y
Figure 1. Pinout (Top View)
Figure 2. Logic Symbol
6
NC
IN A
PIN ASSIGNMENT
1
2
3
GND
OE
IN A
4
5NC
OUT Y
FUNCTION TABLE
L
H
X
AY
L
H
Z
6VCC
Input
Output
OE
H
L
MARKING
DIAGRAMS
9
= Device Marking
M
= Date Code
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
9M
1
UDFN6
1.2 x 1.0
CASE 517AA
1
ULLGA6
1.0 x 1.0
CASE 613AD
ULLGA6
1.2 x 1.0
CASE 613AE
ULLGA6
1.45 x 1.0
CASE 613AF
9M
UDFN6
1.45 x 1.0
CASE 517AQ
UDFN6
1.0 x 1.0
CASE 517BX
1
X M
1
X M
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