參數(shù)資料
型號(hào): NLSF302MNR2
廠商: ON SEMICONDUCTOR
元件分類(lèi): 通用總線(xiàn)功能
英文描述: Quad 2−Input NOR Gate
中文描述: 302 SERIES, QUAD 2-INPUT NOR GATE, QCC16
封裝: QFN-16
文件頁(yè)數(shù): 3/4頁(yè)
文件大?。?/td> 76K
代理商: NLSF302MNR2
NLSF302
http://onsemi.com
3
Power Dissipation Capacitance (Note 1)
C
PD
1. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
)
= C
PD
V
CC
f
in
+ I
CC
/4 (per gate). C
PD
is used to determine the
noload dynamic power consumption; P
D
= C
PD
V
CC2
f
in
+ I
CC
V
CC
.
V
CC
Typ
Min
Symbol
IL
Min
Max
CC
Max
Minimum HighLevel
2.0
1.50
1.50
V
Minimum HighLevel
OH
I
OH
= 4 mA
3.0
2.58
2.48
Output Voltage
I
OL
= 50 A
3.0
I
= 4 mA
OL
in
in
Supply Current
(Input t
= t
= 3.0ns)
Parameter
Test Conditions
V
CC
= 3.3
±
0.3 V C
L
= 15 pF
C
L
= 50 pF
Typical @ 25
°
C, V
CC
= 5.0 V
T
A
= 25
°
C
Typ
15
T
A
= 40 to 85
°
C
Min
pF
Unit
ns
Symbol
Min
10
Max
Max
Maximum Propagation Delay,
t
PLH
,
5.6
7.9
1.0
9.5
5.1
7.5
1.0
8.5
Maximum Input Capacitance
C
in
4
10
pF
NOISE CHARACTERISTICS
(Input t
r
= t
f
= 3.0 ns, C
L
= 50 pF, V
CC
= 5.0V)
Characteristic
Symbol
T
A
= 25
°
C
Typ
Unit
Max
Quiet Output Maximum Dynamic V
OL
Quiet Output Minimum Dynamic V
OL
Minimum High Level Dynamic Input Voltage
V
OLP
V
OLV
V
IHD
0.3
0.8
V
0.3
0.8
V
3.5
V
Maximum Low Level Dynamic Input Voltage
V
ILD
1.5
V
Figure 3. Switching Waveforms
V
CC
GND
50%
50% V
CC
A or B
Y
t
PHL
t
PLH
*Includes all probe and jig capacitance
Figure 4. Test Circuit
C
L
*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 5. Input Equivalent Circuit
INPUT
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